Re: TESTING 2.6.0-test1 S3

Re: TESTING 2.6.0-test1 S3

[Pavel Machek]

Hi!

[Please select either pavel-+ZI9xUNit7I@public.gmane.org, or pavel@suse.cz but not both.]

> > i8042... Its more complicated than that. You need support for whole
> > inputdevices tree. --p
> 
> I made input modular, and reloading I8042 via ssh (great e100 resumes) fixes
> the mouse after S3.
> 
> So, for getting started I8042 needs to be fixed.

Problem is, unlike other drivers, i8042 registers itself as "serio"
driver. So you first need to implement power managment for "serio", so
that suspend event gets through to the i8042.c...

> I guess it is another interrupt problem but have no data...

Vojtech hooks keyboard to both its interrupt pin *and* timer, IIRC, so
it should work with no interrupts at all...
								Pavel

-- 
When do you have a heart between your knees?
[Johanka's followup: and *two* hearts?]


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Re: TEST REPORT: 2.5.73-mm2 S3

[pavel-+ZI9xUNit7I]

Hi!
i8042... Its more complicated than that. You need support for whole inputdevices tree. --p




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Re: TESTING 2.6.0-test1 S3

[Pavel Machek]

Hi!

> > > I made input modular, and reloading I8042 via ssh (great e100 resumes)
> > > fixes the mouse after S3.
> 
> As a temporary fix, I use i8042 as a module and reload it on resume.
> 
> FUI, I am busy with the items below + the BIOS resume failure on the L2,
> which makes S3 effectively unusable.

What is L2?

> I wont work on 2.6 input layer power management at this time and let you 
> know once I get around to it - provided that you did'nt fix it already ;)

Okay.
									Pavel
-- 
Horseback riding is like software...
...vgf orggre jura vgf serr.


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Re: Re: TESTING 2.6.0-test1 S3

[Pavel Machek]

Hi!

> > What is L2?
> 
> Toshiba Libretto L2, TM5600 600MHz, 256MB, legacy free, reasonable DSDT.
> 
> The hard disk seems to resume fine with 2.6-test1. (Needs more testing)
> 
> Other than potential harddisk problems, the last problem of "unknown origin" 
> for getting 2.6/S3  to work is that BIOS reports a resume failure every 
> 5 suspends or so. 
> 
> May have seen an oops flash by before it switches off on entering S3, 
> but it could also have been the e100 badness trace. 
> 
> I suspect it is an ACPI related problem in hwsleep.c, by which the suspend
> mechanism is not properly setup. Maybe timing, missing setting, incompatibility...
> 
> Will have to look at the spec and test it more, and expect to resolve this in 
> the end.
> 
> There are right now more complaints about shared PCI interrupts, which is
> a major nuisance aggravated by silly DSDT's sometimes assigning 5 inputs to
> the same level. 
> 
> Reproduced this on the L2 with IRQ5 for Yenta and USB causing hangs
> and crashes but ought to figure the cause out. What is your opinon
> on this?

It does not happen here...
									Pavel
-- 
Horseback riding is like software...
...vgf orggre jura vgf serr.


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