[U-Boot-Users] Debugging u-boot with BDI2000

[Juergen Beisert <jbeisert@eurodsn.de>]

Hello Wolfgang,

> > Does anybody knows something about the registers OPBA0_CR and OPBA0_PR
> > (OPB Arbiter control and priority)? After reset its contents shows
> > illegal bit values (if I try to interpret the value after reset based on
> > my 405GP manual).
>
> And which CPU model is on your board?

IBM PowerPC 405GP Rev. E (rev register ID is 0x40110145).
The register descriptions of OPBA0_CR and OPBA0_PR confusing me: OPBA0_CR 
resides at MMIO location 0xEF60'0600 and OPBA0_PR at 0xEF60'0601. Both are 
described as two 32 bit registers, but only using the upper 8 bits.

I think I have to access these registers only byte wide at their locations 
0xEF60'0600 and 0xEF60'0601, or both in one 16 bit access at 0xEF60'0600. 
Right?

Best regards, 
Juergen Beisert