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From: Ralf Baechle <ralf@linux-mips.org>
To: exister99@velocitus.net
Cc: linux-mips@linux-mips.org
Subject: Re: mips 32 bit HIGHMEM support
Date: Fri, 10 Oct 2003 16:59:49 +0200	[thread overview]
Message-ID: <20031010145948.GB10373@linux-mips.org> (raw)
In-Reply-To: <20031009140319.GA17647@linux-mips.org>

On Thu, Oct 09, 2003 at 04:03:20PM +0200, Ralf Baechle wrote:

> It's got a limitation - it only works on physically indexed D-caches or
> more exactly processors that don't suffer from cache aliases.  On
> processors that have such aliases the necessary flushes are rather bad
> for performance so this currently simply isn't suported.

Small update - I changed the memory managment code to ignore highmem
on cache configuration that are not supported by the highmem code.

  Ralf

  parent reply	other threads:[~2003-10-10 15:00 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2003-10-08 22:00 mips 32 bit HIGHMEM support exister99
2003-10-08 22:00 ` exister99
2003-10-09 14:03 ` Ralf Baechle
2003-10-09 22:11   ` bug in kernel_entry? Steve Scott
2003-10-09 22:11     ` Steve Scott
2003-10-10 13:23     ` Ralf Baechle
2003-10-10 14:59   ` Ralf Baechle [this message]
2003-10-13 23:15   ` 64 bit kernel in the name of HIGHMEM exister99
2003-10-13 23:15     ` exister99
2003-10-10 17:44 mips 32 bit HIGHMEM support Krishna Kondaka
2003-10-10 17:44 ` Krishna Kondaka
2003-10-10 17:53 ` Ralf Baechle

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