From: Stephen Rothwell <sfr@canb.auug.org.au>
To: James Bottomley <James.Bottomley@SteelEye.com>
Cc: Davide Libenzi <davidel@xmailserver.org>,
Andrew Morton <akpm@linux-foundation.org>,
David Woodhouse <dwmw2@infradead.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-arch@vger.kernel.org
Subject: Re: [patch] (2nd try) add epoll compat code to kernel/compat.c ...
Date: Wed, 14 Feb 2007 10:17:50 +1100 [thread overview]
Message-ID: <20070214101750.587d42db.sfr@canb.auug.org.au> (raw)
In-Reply-To: <1171377785.3382.5.camel@mulgrave.il.steeleye.com>
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On Tue, 13 Feb 2007 08:43:05 -0600 James Bottomley <James.Bottomley@SteelEye.com> wrote:
>
> Not for parisc at the instruction level. In narrow mode (32 bit mode),
> a u64 load has to be done by two 32 bit loads which gives it a 4 byte
> alignment requirement. In wide mode (64 bit mode) the 64 bit load
> instruction explicitly requires 8 byte alignment, so our u64 alignment
> requirements are different. However, this is from the machine code
> point of view. I can't say that gcc doesn't enforce an artificial 8
> byte alignment of u64 in narrow mode, so I'll defer to the gcc experts
> on that one.
Of course, gcc enforced alignment is all we really care about.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
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prev parent reply other threads:[~2007-02-13 23:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-02-12 0:24 Davide Libenzi
2007-02-13 4:35 ` Stephen Rothwell
2007-02-13 7:26 ` Davide Libenzi
2007-02-13 10:11 ` Stephen Rothwell
2007-02-13 14:43 ` James Bottomley
2007-02-13 23:17 ` Stephen Rothwell [this message]
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