From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HUgXp-0006Cw-EE for qemu-devel@nongnu.org; Fri, 23 Mar 2007 05:58:49 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HUgXn-0006CR-HE for qemu-devel@nongnu.org; Fri, 23 Mar 2007 05:58:48 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HUgXn-0006CN-C9 for qemu-devel@nongnu.org; Fri, 23 Mar 2007 04:58:47 -0500 Received: from 85-10-211-152.clients.your-server.de ([85.10.211.152] helo=nesselzelle.de) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1HUgVs-0000XO-6G for qemu-devel@nongnu.org; Fri, 23 Mar 2007 05:56:49 -0400 Received: from neuling ([85.10.211.152]:4963) by nesselzelle.de with [XMail 1.22 SSL Ext 0.0.3a ESMTP Server] via protocol=TLSv1/SSLv3, cipher=AES256-SHA(256) id for from ; Fri, 23 Mar 2007 10:58:03 +0100 Date: Fri, 23 Mar 2007 10:58:25 +0100 From: Thomas Orgis Subject: Re: [Qemu-devel] 0.9.0 and svn don't build with -march=pentium2 etc.; was: Latest SVN fails to build on Fedora Core 6 (same with 0.9.0) Message-ID: <20070323105825.0f2da762@neuling> In-Reply-To: <4602E34C.3000106@gmail.com> References: <20070317143730.1befbf94@neuling> <20070318093734.71d9d77d@neuling> <45FD03F0.5000801@bandsman.co.uk> <20070322204629.5552c047@neuling> <4602E34C.3000106@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Am Thu, 22 Mar 2007 21:13:00 +0100 schrieb Sunil Amitkumar Janki : > I have seen this error as well when building with i686/pentium3/athlon > optimisations. As I am doing a course on x86 assembly programming > at the moment I can tell you that it suffers from register starvation > and the message tells you that there aren't enough registers left. Yeah, that's the message... what I wonder is this is to be expected. Does SSE steal or add registers? -march=pentium-mmx -m3dnow seems to work, though. Is it just a coincidence that gcc optimizattion uses some registers with high march (and SSE) that it didn't use with lower march? I'm wondering if it's the code that is just lucky to compile with some march settings and not so lucky with others or if it's a gcc bug or whatever... Thomas.