From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wolfgang Denk Date: Sat, 04 Oct 2008 01:35:09 +0200 Subject: [U-Boot] (no subject) In-Reply-To: <1223051524-22415-1-git-send-email-Haiying.Wang@freescale.com> References: <1223051524-22415-1-git-send-email-Haiying.Wang@freescale.com> Message-ID: <20081003233509.16E512480D@gemini.denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Haiying Wang, In message <1223051524-22415-1-git-send-email-Haiying.Wang@freescale.com> you wrote: > Fix some bugs: > 1. Correctly set intlv_ctl in cs_config. > 2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled. > 3. Set base_address and total memory for each ddr controller in memory > controller interleaving mode. Can you please (re-) submit your patches with a valid subject? Please keep in mind that the subject is used as the tile line of the commit message, so it is essential. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Often it is fatal to live too long. - Racine