Blue Swirl: fix Sparc32 breakage Signed-off-by: Marcelo Tosatti Index: qemu/target-alpha/exec.h =================================================================== --- qemu.orig/target-alpha/exec.h +++ qemu/target-alpha/exec.h @@ -48,10 +48,15 @@ static always_inline void regs_to_env(vo { } +static always_inline int cpu_has_work(CPUState *env) +{ + return (env->interrupt_request & CPU_INTERRUPT_HARD); +} + static always_inline int cpu_halted(CPUState *env) { if (!env->halted) return 0; - if (env->interrupt_request & CPU_INTERRUPT_HARD) { + if (cpu_has_work(env)) { env->halted = 0; return 0; } Index: qemu/target-i386/exec.h =================================================================== --- qemu.orig/target-i386/exec.h +++ qemu/target-i386/exec.h @@ -338,14 +338,23 @@ static inline void regs_to_env(void) #endif } +static inline int cpu_has_work(CPUState *env) +{ + int work; + + work = (env->interrupt_request & CPU_INTERRUPT_HARD) && + (env->eflags & IF_MASK); + work |= env->interrupt_request & CPU_INTERRUPT_NMI; + + return work; +} + static inline int cpu_halted(CPUState *env) { /* handle exit of HALTED state */ if (!env->halted) return 0; /* disable halt condition */ - if (((env->interrupt_request & CPU_INTERRUPT_HARD) && - (env->eflags & IF_MASK)) || - (env->interrupt_request & CPU_INTERRUPT_NMI)) { + if (cpu_has_work(env)) { env->halted = 0; return 0; } Index: qemu/cpu-all.h =================================================================== --- qemu.orig/cpu-all.h +++ qemu/cpu-all.h @@ -775,6 +775,8 @@ void cpu_reset_interrupt(CPUState *env, void cpu_exit(CPUState *s); +int qemu_cpu_has_work(CPUState *env); + /* Breakpoint/watchpoint flags */ #define BP_MEM_READ 0x01 #define BP_MEM_WRITE 0x02 Index: qemu/cpu-exec.c =================================================================== --- qemu.orig/cpu-exec.c +++ qemu/cpu-exec.c @@ -50,6 +50,11 @@ int tb_invalidated_flag; //#define DEBUG_EXEC //#define DEBUG_SIGNAL +int qemu_cpu_has_work(CPUState *env) +{ + return cpu_has_work(env); +} + void cpu_loop_exit(void) { /* NOTE: the register at this point must be saved by hand because Index: qemu/target-arm/exec.h =================================================================== --- qemu.orig/target-arm/exec.h +++ qemu/target-arm/exec.h @@ -37,14 +37,19 @@ static inline void regs_to_env(void) { } +static inline int cpu_has_work(CPUState *env) +{ + return (env->interrupt_request & + (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)); +} + static inline int cpu_halted(CPUState *env) { if (!env->halted) return 0; /* An interrupt wakes the CPU even if the I and F CPSR bits are set. We use EXITTB to silently wake CPU without causing an actual interrupt. */ - if (env->interrupt_request & - (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)) { + if (cpu_has_work(env)) { env->halted = 0; return 0; } Index: qemu/target-cris/exec.h =================================================================== --- qemu.orig/target-cris/exec.h +++ qemu/target-cris/exec.h @@ -40,6 +40,11 @@ static inline void regs_to_env(void) void cpu_cris_flush_flags(CPUCRISState *env, int cc_op); void helper_movec(CPUCRISState *env, int reg, uint32_t val); +static inline int cpu_has_work(CPUState *env) +{ + return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI)); +} + static inline int cpu_halted(CPUState *env) { if (!env->halted) return 0; Index: qemu/target-m68k/exec.h =================================================================== --- qemu.orig/target-m68k/exec.h +++ qemu/target-m68k/exec.h @@ -41,10 +41,15 @@ static inline void regs_to_env(void) #include "softmmu_exec.h" #endif +static inline int cpu_has_work(CPUState *env) +{ + return (env->interrupt_request & (CPU_INTERRUPT_HARD)); +} + static inline int cpu_halted(CPUState *env) { if (!env->halted) return 0; - if (env->interrupt_request & CPU_INTERRUPT_HARD) { + if (cpu_has_work(env)) { env->halted = 0; return 0; } Index: qemu/target-mips/exec.h =================================================================== --- qemu.orig/target-mips/exec.h +++ qemu/target-mips/exec.h @@ -33,12 +33,18 @@ static inline void regs_to_env(void) { } +static inline int cpu_has_work(CPUState *env) +{ + return (env->interrupt_request & + (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER)); +} + + static inline int cpu_halted(CPUState *env) { if (!env->halted) return 0; - if (env->interrupt_request & - (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER)) { + if (cpu_has_work(env)) { env->halted = 0; return 0; } Index: qemu/target-ppc/exec.h =================================================================== --- qemu.orig/target-ppc/exec.h +++ qemu/target-ppc/exec.h @@ -44,11 +44,17 @@ static always_inline void regs_to_env (v { } +static always_inline int cpu_has_work(CPUState *env) +{ + return (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD)); +} + + static always_inline int cpu_halted (CPUState *env) { if (!env->halted) return 0; - if (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD)) { + if (cpu_has_work(env)) { env->halted = 0; return 0; } Index: qemu/target-sh4/exec.h =================================================================== --- qemu.orig/target-sh4/exec.h +++ qemu/target-sh4/exec.h @@ -28,10 +28,15 @@ register struct CPUSH4State *env asm(ARE #include "cpu.h" #include "exec-all.h" +static inline int cpu_has_work(CPUState *env) +{ + return (env->interrupt_request & CPU_INTERRUPT_HARD); +} + static inline int cpu_halted(CPUState *env) { if (!env->halted) return 0; - if (env->interrupt_request & CPU_INTERRUPT_HARD) { + if (cpu_has_work(env)) { env->halted = 0; env->intr_at_halt = 1; return 0; Index: qemu/target-sparc/exec.h =================================================================== --- qemu.orig/target-sparc/exec.h +++ qemu/target-sparc/exec.h @@ -24,10 +24,17 @@ static inline void regs_to_env(void) /* op_helper.c */ void do_interrupt(CPUState *env); +static inline int cpu_has_work(CPUState *env1) +{ + return (env1->interrupt_request & CPU_INTERRUPT_HARD) && + (env1->psret != 0); +} + + static inline int cpu_halted(CPUState *env1) { if (!env1->halted) return 0; - if ((env1->interrupt_request & CPU_INTERRUPT_HARD) && (env1->psret != 0)) { + if (cpu_has_work(env1)) { env1->halted = 0; return 0; } --