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From: Oliver Neukum <oliver@neukum.org>
To: "Gadiyar, Anand" <gadiyar@ti.com>
Subject: Re: USB mass storage and ARM cache coherency
Date: Thu, 18 Feb 2010 07:56:14 +0100
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Cc: Alan Stern <stern@rowland.harvard.edu>,
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       "Russell King - ARM Linux" <linux@arm.linux.org.uk>,
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Am Mittwoch, 17. Februar 2010 21:30:24 schrieb Gadiyar, Anand:
> > Why do you skip mapping the setup packet but not the data packet?
> > 
> 
> I think that's oversight. For this controller, we need to skip mapping
> all buffers used to do transfers on EP0, which is all control transfers.

One thing more. Do you have an issue with EP 0 only or all control
endpoints? EP 0 must be control, but devices are within spec if they
have multiple control endpoints provided EP 0 is control.

	Regards
		Oliver

From mboxrd@z Thu Jan  1 00:00:00 1970
From: oliver@neukum.org (Oliver Neukum)
Date: Thu, 18 Feb 2010 07:56:14 +0100
Subject: USB mass storage and ARM cache coherency
In-Reply-To: <5A47E75E594F054BAF48C5E4FC4B92AB03216236D6@dbde02.ent.ti.com>
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Message-ID: <201002180756.14100.oliver@neukum.org>
To: linux-arm-kernel@lists.infradead.org
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Am Mittwoch, 17. Februar 2010 21:30:24 schrieb Gadiyar, Anand:
> > Why do you skip mapping the setup packet but not the data packet?
> > 
> 
> I think that's oversight. For this controller, we need to skip mapping
> all buffers used to do transfers on EP0, which is all control transfers.

One thing more. Do you have an issue with EP 0 only or all control
endpoints? EP 0 must be control, but devices are within spec if they
have multiple control endpoints provided EP 0 is control.

	Regards
		Oliver