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Date: Fri, 20 Aug 2010 10:16:05 +0200
From: Ingo Molnar <mingo@elte.hu>
To: Don Zickus <dzickus@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
        Robert Richter <robert.richter@amd.com>,
        Cyrill Gorcunov <gorcunov@gmail.com>, Lin Ming <ming.m.lin@intel.com>,
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        "Huang, Ying" <ying.huang@intel.com>, Yinghai Lu <yinghai@kernel.org>,
        Andi Kleen <andi@firstfloor.org>
Subject: Re: [PATCH -v3] perf, x86: try to handle unknown nmis with running
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* Don Zickus <dzickus@redhat.com> wrote:

> On Thu, Aug 19, 2010 at 04:27:13PM +0200, Peter Zijlstra wrote:
> > On Thu, 2010-08-19 at 10:12 -0400, Don Zickus wrote:
> > > On Thu, Aug 19, 2010 at 12:45:53PM +0200, Peter Zijlstra wrote:
> > > > 
> > > > I queued it with that part changed to:
> > > 
> > > I realized the other day this change doesn't cover the nehalem, core and p4
> > > cases which use
> > > 
> > > intel_pmu_handle_irq
> > > p4_pmu_handle_irq
> > > 
> > > as their handlers.  Though that patch can go on top of Robert's.
> > 
> > Something like this?
> 
> I tested this patch and Robert's on an AMD box and Nehalem box.  Both
> worked as intended.  However I did notice that whenever the AMD box
> detected handled >1, it was shortly followed by an unknown_nmi that was
> properly eaten with Robert's logic.  Whereas on the Nehalem box I saw a
> lot of 'handled > 1' messages but very very few of them were followed by
> an unknown_nmi message (and those messages that did come were properly
> eaten).
> 
> Maybe that is just the differences in the cpu designs.
> 
> Of course I had to make the one change I mentioned previously for the
> perf_event_intel.c file (moving the handled++ logic down a few lines).
> 
> I didn't run the test on a P4 box.
> 
> Looks great, thanks guys!

Please someone send the final version with a changelog, with all the acks and 
tested-by's added, so that i can send it Linuswards.

Thanks,

	Ingo