From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=58840 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Ooh1H-0003N0-Bo for qemu-devel@nongnu.org; Thu, 26 Aug 2010 14:17:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Ooh1B-0003xC-VT for qemu-devel@nongnu.org; Thu, 26 Aug 2010 14:17:47 -0400 Received: from smtp.mailix.net ([66.11.225.183]:28959) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Ooh1B-0003wj-L4 for qemu-devel@nongnu.org; Thu, 26 Aug 2010 14:17:41 -0400 From: "Adnan Khaleel" Subject: =?iso-8859-1?Q?Re=3A_=5BQemu-devel=5D_Template_for_developing_a_Qe?= =?iso-8859-1?Q?mu_device_with=09PCIe=3Fand_MSI-X?= In-Reply-To: 20100826094356.GF16489@valinux.co.jp Message-ID: <20100826181738.9bdafe6d@shadowfax.no-ip.com> Date: Thu, 26 Aug 2010 13:17:38 -0500 MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="-----------f6fee1686365d4888b07072390f9c0e0" Reply-To: adnan@khaleel.us List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Isaku Yamahata Cc: qemu-devel@nongnu.org This is a multi-part message in MIME format. -------------f6fee1686365d4888b07072390f9c0e0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi there. I should have sent a lot of these with my note yesterday but I= was in a hurry to get the files to you first.=20 See my comments below and thanks again. AK =20 pcie=5Fmsix=5Fwrite=5Fconfig() should call pci=5Fdefault=5Fwrite=5Fcon= fig() unless you did it so intentionally.I've made this change. Thanks for t= he pointer. =20 You also want to catch up pci api clean up. pci=5F{set, get}=5F{byte, word, long, quad}(), pci=5Fconfig=5Fset=5Fvendor() ...Are you referring to the setting up o= f the config registers where we pass on the vendor id and device id etc= =3F Would you elaborate a little more. Also, I've got a bunch of questions but let me state my assumptions firs= t so that you have a better idea of what I'm referring to. - The device template is a pcie endpoint - I want to be able to setup 64bit bar addresses, with large apertures - For now, I'd like to be able to do basic MMIO and regular IO reads and= writes.=20 PCIe questions. 1. What does the topology of the bridge with respect to the root look li= ke=3F Is it Root <---> PCIe Bridge 2. If so, where is the slot where I can insert the PCIe device=3F Is it = off the Bridge or would it be better for it to be off the root=3F Root <---> PCIe Bridge <---> PCIe/MSI-X device Or Root <---> PCIe Bridge <---> PCIe/MSI-X Device And hence my confusion about how to do the following: static void pcie=5Fmsix=5Fregister(void) { =20 pci=5Fbridge=5Fqdev=5Fregister(&pcie=5Fmsix=5Finfo); // Is this w= hat I should be doing=3F OR pci=5Fqdev=5Fregister(&pcie=5Fmsix=5Finfo); // Or this } 3. I wasn't sure how to register the device how to do the initializing. = Please see the following section of code: void pcie=5Fmsix=5Finit(PCIBus *bus) { // Is this how we should be doing this=3F pci=5Fcreate=5Fsimple(bus, -1, "pcie=5Fmsix=5Fdevice"); OR pci=5Fbridge=5Fcreate(...); } Or if should I use pci=5Fbridge=5Fcreate(...) in place of the pci=5Fcrea= te=5Fsimple(...) Also, this confusion led me to being unsure what the following device st= ruct should look like typedef struct PCIE=5FMSIX=5FDEVState=5FSt { PCIDevice dev; int mmio=5Findex; } PCIE=5FMSIX=5FDEVState; For the simple device function that I've described above, what is the pu= rpose of this struct=3F What other data should be captured=3F Which include the initializing of the following static structs. Btw, can= you tell me what VMStateDescrption is used for by Qemu=3F Also, what sh= ould the "fields" member contain=3F I couldn't quite make out. static const VMStateDescription vmstate=5Fpcie=5Fmsix =3D { .name =3D "pcie-msix-device", .version=5Fid =3D 1, .minimum=5Fversion=5Fid =3D 1, .minimum=5Fversion=5Fid=5Fold =3D 1, .fields =3D (VMStateField[]) { VMSTATE=5FPCIE=5FDEVICE(dev, PCIE=5FMSIX=5FDEVState), VMSTATE=5FSTRUCT(dev.aer=5Flog, PCIE=5FMSIX=5FDEVState, 0, vmsta= te=5Fpcie=5Faer=5Flog, struct pcie=5Faer=5Flog), VMSTATE=5FEND=5FOF=5FLIST() } }; 4. What is the qdev.props field used for=3F static PCIDeviceInfo pcie=5Fmsix=5Finfo =3D { .qdev.name =3D PCIE=5FMSIX=5FDEVICE, .qdev.desc =3D "PCIE MSIX device template", .qdev.size =3D sizeof(PCIE=5FMSIX=5FDEVState), .qdev.reset =3D pcie=5Fmsix=5Freset, .qdev.vmsd =3D &vmstate=5Fpcie=5Fmsix, .is=5Fexpress =3D 1, .config=5Fwrite =3D pcie=5Fmsix=5Fwrite=5Fconfig, .init =3D pcie=5Fmsix=5Finitfn, .exit =3D pcie=5Fmsix=5Fexitfn, .qdev.props =3D (Property[]) { =20 DEFINE=5FPROP=5FEND=5FOF=5FLIST(), } }; 5. Device instantiation I init the device in pc=5Fq35=5Fbridge=5Finit() in pc=5Fq35.c pcie=5Fmsix=5Finit(root=5Fport=5Fbus); I know I'm doing this incorrectly since I'm not specifying several thing= s. Again, is this the correct place to init the device=3F MSI/MSIX questions 1. How is an interrupt notification passed on to Qemu=3F In the regular = case I'd use qemu=5Fset=5Firq(..) to do so but what is the correct way o= f doing it in the MSIX paradigm=3F For example in the case of a DMA tran= sfer. -------------f6fee1686365d4888b07072390f9c0e0 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi there. I should have sent a lot of these with my note yesterday but I= was in a hurry to get  the files to you first.
See my comments= below and thanks again.

AK

pcie=5Fmsix=5Fwrite=5Fconfig() should call pci=5Fdefault=5Fwrite=5Fconfi= g()
unless you did it so intentionally.
I've made this change. T= hanks for the pointer.
<= span>

You also want to catch up pci api clean up.
pci=5F{set, get}=5F{byte, word, long, quad}(),
pci=5Fconfig=5Fset=5Fvendor() ...
Are you referring to the s= etting up of the config registers where we pass on the vendor id and dev= ice id etc=3F Would you elaborate a little more.

Also, I've got a= bunch of questions but let me state my assumptions first so that you ha= ve a better idea of what I'm referring to.
- The device template is a= pcie endpoint
- I want to be able to setup 64bit bar addresses, with= large apertures
- For now, I'd like to be able to do basic MMIO and = regular IO reads and writes.


PCIe questions.
1. What does the topology of the bridge with respect to= the root look like=3F Is it

Root <---> PCIe Bridge

2. If so, where is the slot = where I can insert the PCIe device=3F Is it off the Bridge or would it b= e better for it to be off the root=3F

Root <---> PCIe Bridge <---> PCIe/MSI-X de= vice

Or

Root <---> PCIe Bridge
 &= nbsp;   <---> PCIe/MSI-X Device

And hence = my confusion about how to do the following:
static void pcie=5Fmsix=5Fregister(void)
{  
    pci=5Fbridge=5Fqdev=5Fregister(&pcie=5Fmsix=5Finf= o);  // Is this what I should be doing=3F
  &nb= sp;     OR
    pci=5Fqdev=5Fregister(&pcie=5Fmsix=5Finfo); =         // Or this
}

3. I wasn't sure how = to register the device how to do the initializing. Please see the follow= ing section of code:

void pcie=5Fmsix=5Finit(PCIBus *bus)
{
  &nbs= p; // Is this how we should be doing this=3F
    = pci=5Fcreate=5Fsimple(bus, -1, "pcie=5Fmsix=5Fdevice");
 =        OR
     = ;   pci=5Fbridge=5Fcreate(...);
}

Or if should I use= pci=5Fbridge=5Fcreate(...) i= n place of the pci=5Fcreate=5Fsimple(...)

Also, this confu= sion led me to being unsure what the following device struct should look= like

typedef struct PCIE=5FMSIX=5FDEVState=5FSt {
  = ;  PCIDevice dev;
    int mmio=5Findex;
} PCIE= =5FMSIX=5FDEVState;

For the simple device function that I've desc= ribed above, what is the purpose of this struct=3F What other data shoul= d be captured=3F

Which include the initializing of the following = static structs. Btw, can you tell me what VMStateDescrption is used for = by Qemu=3F Also, what should the "fields" member contain=3F I couldn't q= uite make out.

static const= VMStateDescription vmstate=5Fpcie=5Fmsix =3D {
  &nbs= p; .name =3D "pcie-msix-device",
    .version=5Fi= d =3D 1,
    .minimum=5Fversion=5Fid =3D 1,
    .minimum=5Fversion=5Fid=5Fold =3D 1,
 = ;   .fields =3D (VMStateField[]) {
   &= nbsp;    VMSTATE=5FPCIE=5FDEVICE(dev, PCIE=5FMSIX=5FDEVSt= ate),
        VMSTATE=5FSTRUC= T(dev.aer=5Flog, PCIE=5FMSIX=5FDEVState, 0, vmstate=5Fpcie=5Faer=5Flog, = struct pcie=5Faer=5Flog),
      &n= bsp; VMSTATE=5FEND=5FOF=5FLIST()
    }
};=

4. What is the qdev.props field used for=3F
static PCIDeviceInfo pcie=5Fmsix=5Finfo = =3D {
    .qdev.name =3D PCIE=5FMSIX=5FDEVICE,
    .qdev.desc =3D "PCIE MSIX device template",
    .qdev.size =3D sizeof(PCIE=5FMSIX=5FDEVState),
    .qdev.reset =3D pcie=5Fmsix=5Freset,&= nbsp;   .qdev.vmsd =3D &vmstate=5Fpcie=5Fmsix,
&nb= sp;   .is=5Fexpress =3D 1,
    .config= =5Fwrite =3D pcie=5Fmsix=5Fwrite=5Fconfig,
    .i= nit =3D pcie=5Fmsix=5Finitfn,
=     .exit =3D pcie= =5Fmsix=5Fexitfn,
    .qdev.props =3D (Property[= ]) {       
  &nbs= p;     DEFINE=5FPROP=5FEND=5FOF=5FLIST(),
&n= bsp;   }
};


5. Device instantiation
I init the device in pc=5Fq= 35=5Fbridge=5Finit() in pc=5Fq35.c

pcie=5Fmsix=5Finit(root=5Fport=5Fbus);

I know I'm = doing this incorrectly since I'm not specifying several things. Again, i= s this the correct place to init the device=3F


MSI/MSIX questions1. How is an interrupt notification passed on to Qemu=3F In the regula= r case I'd use qemu=5Fset=5Firq(..) to do so but what is the correct way= of doing it in the MSIX paradigm=3F For example in the case of a DMA tr= ansfer.

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