From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eduard - Gabriel Munteanu Subject: Re: [PATCH 3/7] AMD IOMMU emulation Date: Sun, 29 Aug 2010 00:53:33 +0300 Message-ID: <20100828215333.GA7270@localhost> References: <1283007298-10942-1-git-send-email-eduard.munteanu@linux360.ro> <1283007298-10942-4-git-send-email-eduard.munteanu@linux360.ro> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: mst@redhat.com, joro@8bytes.org, paul@codesourcery.com, avi@redhat.com, anthony@codemonkey.ws, av1474@comtv.ru, yamahata@valinux.co.jp, kvm@vger.kernel.org, qemu-devel@nongnu.org To: Blue Swirl Return-path: Received: from mail-bw0-f46.google.com ([209.85.214.46]:36935 "EHLO mail-bw0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752524Ab0H1VzV (ORCPT ); Sat, 28 Aug 2010 17:55:21 -0400 Received: by bwz11 with SMTP id 11so2811955bwz.19 for ; Sat, 28 Aug 2010 14:55:19 -0700 (PDT) Content-Disposition: inline In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On Sat, Aug 28, 2010 at 03:58:23PM +0000, Blue Swirl wrote: > On Sat, Aug 28, 2010 at 2:54 PM, Eduard - Gabriel Munteanu > wrote: > > This introduces emulation for the AMD IOMMU, described in "AMD I/O > > Virtualization Technology (IOMMU) Specification". > > > > Signed-off-by: Eduard - Gabriel Munteanu > > --- [snip] > > diff --git a/hw/amd_iommu.c b/hw/amd_iommu.c > > new file mode 100644 > > index 0000000..43e0426 > > --- /dev/null > > +++ b/hw/amd_iommu.c [snip] > > +static void amd_iommu_update_mmio(AMDIOMMUState *st, > > + ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ??target_phys_addr_t addr) > > +{ > > + ?? ??size_t reg = addr & ~0x07; > > + ?? ??uint64_t *base = (uint64_t *) &st->mmio_buf[reg]; > > This is still buggy. > > > + ?? ??uint64_t val = le64_to_cpu(*base); mmio_buf is always LE, so a BE host will have *base in reversed byteorder. But look at the next line, where I did the le64_to_cpu(). That should swap the bytes on a BE host, yielding the correct byteorder. On a LE host, *base is right the first time and le64_to_cpu() is a nop. In any case, I only use 'val', not '*base' directly. I suppose it could be rewritten for clarity (i.e. ditch 'base'). Do you still think it's wrong? Or is it for another reason? Thanks, Eduard From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=45791 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OpTNU-00088D-RW for qemu-devel@nongnu.org; Sat, 28 Aug 2010 17:55:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OpTMu-0007M2-TW for qemu-devel@nongnu.org; Sat, 28 Aug 2010 17:55:21 -0400 Received: from mail-bw0-f45.google.com ([209.85.214.45]:37082) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OpTMu-0007Lu-NG for qemu-devel@nongnu.org; Sat, 28 Aug 2010 17:55:20 -0400 Received: by bwz3 with SMTP id 3so2976098bwz.4 for ; Sat, 28 Aug 2010 14:55:19 -0700 (PDT) Sender: Eduard - Gabriel Munteanu Date: Sun, 29 Aug 2010 00:53:33 +0300 From: Eduard - Gabriel Munteanu Message-ID: <20100828215333.GA7270@localhost> References: <1283007298-10942-1-git-send-email-eduard.munteanu@linux360.ro> <1283007298-10942-4-git-send-email-eduard.munteanu@linux360.ro> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: [Qemu-devel] Re: [PATCH 3/7] AMD IOMMU emulation List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: kvm@vger.kernel.org, mst@redhat.com, joro@8bytes.org, qemu-devel@nongnu.org, yamahata@valinux.co.jp, avi@redhat.com, paul@codesourcery.com On Sat, Aug 28, 2010 at 03:58:23PM +0000, Blue Swirl wrote: > On Sat, Aug 28, 2010 at 2:54 PM, Eduard - Gabriel Munteanu > wrote: > > This introduces emulation for the AMD IOMMU, described in "AMD I/O > > Virtualization Technology (IOMMU) Specification". > > > > Signed-off-by: Eduard - Gabriel Munteanu > > --- [snip] > > diff --git a/hw/amd_iommu.c b/hw/amd_iommu.c > > new file mode 100644 > > index 0000000..43e0426 > > --- /dev/null > > +++ b/hw/amd_iommu.c [snip] > > +static void amd_iommu_update_mmio(AMDIOMMUState *st, > > + ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ??target_phys_addr_t addr) > > +{ > > + ?? ??size_t reg = addr & ~0x07; > > + ?? ??uint64_t *base = (uint64_t *) &st->mmio_buf[reg]; > > This is still buggy. > > > + ?? ??uint64_t val = le64_to_cpu(*base); mmio_buf is always LE, so a BE host will have *base in reversed byteorder. But look at the next line, where I did the le64_to_cpu(). That should swap the bytes on a BE host, yielding the correct byteorder. On a LE host, *base is right the first time and le64_to_cpu() is a nop. In any case, I only use 'val', not '*base' directly. I suppose it could be rewritten for clarity (i.e. ditch 'base'). Do you still think it's wrong? Or is it for another reason? Thanks, Eduard