From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Tue, 7 Sep 2010 16:47:58 -0500 Subject: [U-Boot] [PATCH][v2] mpc8308_p1m: support for MPC8308 P1M board In-Reply-To: <1283769172-28927-1-git-send-email-yanok@emcraft.com> References: <1282744826-21200-1-git-send-email-yanok@emcraft.com> <1283769172-28927-1-git-send-email-yanok@emcraft.com> Message-ID: <20100907164758.53dd44b9@schlenkerla.am.freescale.net> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, 6 Sep 2010 12:32:52 +0200 Ilya Yanok wrote: > +static void resume_from_sleep(void) > +{ > + u32 magic = *(u32 *)0; > + > + typedef void (*func_t)(void); > + func_t resume = *(func_t *)4; > + > + if (magic == 0xf5153ae5) > + resume(); > + > + gd->flags &= ~GD_FLG_SILENT; > + puts("\nResume from sleep failed: bad magic word\n"); > +} 8308 does not support deep sleep, so it doesn't need this function. Likewise, PMCCR1 does not exist on 8308, so don't read it. > +/* Fixed sdram init -- doesn't use serial presence detect. > + * > + * This is useful for faster booting in configs where the RAM is unlikely > + * to be changed, or for things like NAND booting where space is tight. > + */ > +static long fixed_sdram(void) > +{ > + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; > + u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; > + u32 msize_log2 = __ilog2(msize); > + > + out_be32(&im->sysconf.ddrlaw[0].bar, > + CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000); > + out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); > + out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); > + > + /* > + * Erratum DDR3 requires a 50ms delay after clearing DDRCDR[DDR_cfg], > + * or the DDR2 controller may fail to initialize correctly. > + */ > + udelay(50000); I don't see this erratum on 8308. -Scott