From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Ball Subject: Re: [patch 1/1] sdhci-base-clock-freqency-change-in-spec-3.0 Date: Tue, 14 Sep 2010 14:18:53 +0100 Message-ID: <20100914131853.GC17079@void.printf.net> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from void.printf.net ([89.145.121.20]:60529 "EHLO void.printf.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752033Ab0INNSz (ORCPT ); Tue, 14 Sep 2010 09:18:55 -0400 Content-Disposition: inline In-Reply-To: Sender: linux-mmc-owner@vger.kernel.org List-Id: linux-mmc@vger.kernel.org To: zhangfei gao Cc: Andrew Morton , linux-mmc@vger.kernel.org, Anton Vorontsov , Ben Dooks , Wolfram Sang , Matt Fleming , Haojian Zhuang , Eric Miao Hi, On Fri, Aug 20, 2010 at 02:22:56AM -0400, zhangfei gao wrote: > From: Zhangfei Gao > Date: Fri, 20 Aug 2010 14:02:36 -0400 > Subject: [PATCH] sdhci: base clock freqency change in spec 3.0 Thanks, applied to mmc-next. We should have all of the changes required for SDHC 3.0 (8-bit wide data, 10-bit divided clock mode, base clock frequency change) present in the mmc-next tree now. Would someone with access to 3.0 hardware be able to test that it's all working? -- Chris Ball One Laptop Per Child