On Wed, Sep 15, 2010 at 11:35:18AM +0800, zhangfei gao wrote:

> > Is the 8-bit support really according to the standard? I wonder because
> > the bit currently used by sdhci.c is marked as "reserved/new assignment
> > now allowed" in the simplified v2.0 spec.
> 
> Attached capacity in sdh 3.0.
> 6-bit base clock frequece is support in 1.0 and 2.0, support 10M to 63M.
> 8-bit is supported in 3.0, and support 10M to 255M.

I meant 8-bit bus width. Which bit in which register selects this?

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