From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark Brown Subject: Re: [PATCH] EDB93xx: Add support for CS4271 CODEC on EDB93xx boards Date: Wed, 2 Feb 2011 18:31:58 +0000 Message-ID: <20110202183158.GG9810@sirena.org.uk> References: <1296603653.1504.9.camel@r60e> <0D753D10438DA54287A00B027084269764CEF59B2B@AUSP01VMBX24.collaborationhost.net> <1296643688.1504.23.camel@r60e> <20110202104943.GN12743@opensource.wolfsonmicro.com> <1296645167.1504.31.camel@r60e> <20110202125327.GO12743@opensource.wolfsonmicro.com> <1296653211.1504.40.camel@r60e> <0D753D10438DA54287A00B027084269764CEFD45C8@AUSP01VMBX24.collaborationhost.net> <20110202165959.GT12743@opensource.wolfsonmicro.com> <1296667999.1504.44.camel@r60e> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from cassiel.sirena.org.uk (cassiel.sirena.org.uk [80.68.93.111]) by alsa0.perex.cz (Postfix) with ESMTP id 002152455E for ; Wed, 2 Feb 2011 19:32:00 +0100 (CET) Content-Disposition: inline In-Reply-To: <1296667999.1504.44.camel@r60e> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: alsa-devel-bounces@alsa-project.org Errors-To: alsa-devel-bounces@alsa-project.org To: Alexander Sverdlin Cc: Dimitris Papastamos , "alsa-devel@alsa-project.org" , "linux-arm-kernel@lists.infradead.org" , H Hartley Sweeten , Lennert Buytenhek , Liam Girdwood List-Id: alsa-devel@alsa-project.org On Wed, Feb 02, 2011 at 08:33:19PM +0300, Alexander Sverdlin wrote: > It's a chip select. The way I've managed it in CODEC it's because Cirrus > boards do not have any other SPI devices. Supported by current mainline, > at least. Please do this properly with the SPI core. From mboxrd@z Thu Jan 1 00:00:00 1970 From: broonie@opensource.wolfsonmicro.com (Mark Brown) Date: Wed, 2 Feb 2011 18:31:58 +0000 Subject: [PATCH] EDB93xx: Add support for CS4271 CODEC on EDB93xx boards In-Reply-To: <1296667999.1504.44.camel@r60e> References: <1296603653.1504.9.camel@r60e> <0D753D10438DA54287A00B027084269764CEF59B2B@AUSP01VMBX24.collaborationhost.net> <1296643688.1504.23.camel@r60e> <20110202104943.GN12743@opensource.wolfsonmicro.com> <1296645167.1504.31.camel@r60e> <20110202125327.GO12743@opensource.wolfsonmicro.com> <1296653211.1504.40.camel@r60e> <0D753D10438DA54287A00B027084269764CEFD45C8@AUSP01VMBX24.collaborationhost.net> <20110202165959.GT12743@opensource.wolfsonmicro.com> <1296667999.1504.44.camel@r60e> Message-ID: <20110202183158.GG9810@sirena.org.uk> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, Feb 02, 2011 at 08:33:19PM +0300, Alexander Sverdlin wrote: > It's a chip select. The way I've managed it in CODEC it's because Cirrus > boards do not have any other SPI devices. Supported by current mainline, > at least. Please do this properly with the SPI core.