From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:40886) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QOcPU-00081u-Ps for qemu-devel@nongnu.org; Mon, 23 May 2011 17:11:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QOcPS-0006cM-Ux for qemu-devel@nongnu.org; Mon, 23 May 2011 17:11:32 -0400 Received: from hall.aurel32.net ([88.191.126.93]:53500) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QOcPS-0006bR-E3 for qemu-devel@nongnu.org; Mon, 23 May 2011 17:11:30 -0400 Date: Mon, 23 May 2011 23:11:21 +0200 From: Aurelien Jarno Message-ID: <20110523211121.GB15554@hall.aurel32.net> References: <1305812821-6805-1-git-send-email-pbonzini@redhat.com> <1305812821-6805-3-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1305812821-6805-3-git-send-email-pbonzini@redhat.com> Sender: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH 2/3] softfloat: extract softfloat-target.h List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: qemu-devel@nongnu.org On Thu, May 19, 2011 at 03:47:00PM +0200, Paolo Bonzini wrote: > Most definitions in softfloat.h are really target-independent. Split > the few that stand out as target-dependent, to allow including > softfloat.h from files that are not compiled per-target. Looks ok in principle, but I wonder if we should really create a new header for that. softfloat-specialize.h is already supposed to contain the target specific functions, so it's probably a good idea to move them there instead. Also please note that this will conflict with the patch series I sent recently about removing softfloat-native (most of the patches have been acked, I'll send a new series soon). > Signed-off-by: Paolo Bonzini > --- > fpu/softfloat-target.h | 119 ++++++++++++++++++++++++++++++++++++++++++++++++ > fpu/softfloat.c | 11 +++- > fpu/softfloat.h | 70 +---------------------------- > target-arm/helper.c | 1 + > 4 files changed, 129 insertions(+), 72 deletions(-) > create mode 100644 fpu/softfloat-target.h > > diff --git a/fpu/softfloat-target.h b/fpu/softfloat-target.h > new file mode 100644 > index 0000000..513542c > --- /dev/null > +++ b/fpu/softfloat-target.h > @@ -0,0 +1,119 @@ > +/* > + * QEMU float support > + * > + * Derived from SoftFloat. > + */ > + > +/*============================================================================ > + > +This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic > +Package, Release 2b. > + > +Written by John R. Hauser. This work was made possible in part by the > +International Computer Science Institute, located at Suite 600, 1947 Center > +Street, Berkeley, California 94704. Funding was partially provided by the > +National Science Foundation under grant MIP-9311980. The original version > +of this code was written as part of a project to build a fixed-point vector > +processor in collaboration with the University of California at Berkeley, > +overseen by Profs. Nelson Morgan and John Wawrzynek. More information > +is available through the Web page `http://www.cs.berkeley.edu/~jhauser/ > +arithmetic/SoftFloat.html'. > + > +THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has > +been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES > +RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS > +AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES, > +COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE > +EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE > +INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR > +OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE. > + > +Derivative works are acceptable, even for commercial purposes, so long as > +(1) the source code for the derivative work includes prominent notice that > +the work is derivative, and (2) the source code includes prominent notice with > +these four paragraphs for those parts of this code that are retained. > + > +=============================================================================*/ > + > +#ifndef SOFTFLOAT_TARGET_H > +#define SOFTFLOAT_TARGET_H > + > +#include "softfloat.h" > +#include "config-target.h" > + > +#if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) > +#define SNAN_BIT_IS_ONE 1 > +#else > +#define SNAN_BIT_IS_ONE 0 > +#endif > + > +#ifdef CONFIG_SOFTFLOAT > + > +/*---------------------------------------------------------------------------- > +| The pattern for a default generated half-precision NaN. > +*----------------------------------------------------------------------------*/ > +#if defined(TARGET_ARM) > +#define float16_default_nan make_float16(0x7E00) > +#elif SNAN_BIT_IS_ONE > +#define float16_default_nan make_float16(0x7DFF) > +#else > +#define float16_default_nan make_float16(0xFE00) > +#endif > + > +/*---------------------------------------------------------------------------- > +| The pattern for a default generated single-precision NaN. > +*----------------------------------------------------------------------------*/ > +#if defined(TARGET_SPARC) > +#define float32_default_nan make_float32(0x7FFFFFFF) > +#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) > +#define float32_default_nan make_float32(0x7FC00000) > +#elif SNAN_BIT_IS_ONE > +#define float32_default_nan make_float32(0x7FBFFFFF) > +#else > +#define float32_default_nan make_float32(0xFFC00000) > +#endif > + > +/*---------------------------------------------------------------------------- > +| The pattern for a default generated double-precision NaN. > +*----------------------------------------------------------------------------*/ > +#if defined(TARGET_SPARC) > +#define float64_default_nan make_float64(LIT64( 0x7FFFFFFFFFFFFFFF )) > +#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) > +#define float64_default_nan make_float64(LIT64( 0x7FF8000000000000 )) > +#elif SNAN_BIT_IS_ONE > +#define float64_default_nan make_float64(LIT64( 0x7FF7FFFFFFFFFFFF )) > +#else > +#define float64_default_nan make_float64(LIT64( 0xFFF8000000000000 )) > +#endif > + > +#ifdef FLOATX80 > + > +#if SNAN_BIT_IS_ONE > +#define floatx80_default_nan_high 0x7FFF > +#define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF ) > +#else > +#define floatx80_default_nan_high 0xFFFF > +#define floatx80_default_nan_low LIT64( 0xC000000000000000 ) > +#endif > + > +#endif > + > +#ifdef FLOAT128 > + > +/*---------------------------------------------------------------------------- > +| The pattern for a default generated quadruple-precision NaN. The `high' and > +| `low' values hold the most- and least-significant bits, respectively. > +*----------------------------------------------------------------------------*/ > +#if SNAN_BIT_IS_ONE > +#define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF ) > +#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF ) > +#else > +#define float128_default_nan_high LIT64( 0xFFFF800000000000 ) > +#define float128_default_nan_low LIT64( 0x0000000000000000 ) > +#endif > + > +#endif > + > +#endif /* !CONFIG_SOFTFLOAT */ > + > +#endif /* !SOFTFLOAT_TARGET_H */ > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index baba1dc..72aefc5 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -45,12 +45,17 @@ these four paragraphs for those parts of this code that are retained. > #include "softfloat-macros.h" > > /*---------------------------------------------------------------------------- > +| Public functions and definitions for the default generated quiet NaNs. > +| This is target-specific. > +*----------------------------------------------------------------------------*/ > +#include "softfloat-target.h" > + > +/*---------------------------------------------------------------------------- > | Functions and definitions to determine: (1) whether tininess for underflow > | is detected before or after rounding by default, (2) what (if anything) > | happens when exceptions are raised, (3) how signaling NaNs are distinguished > -| from quiet NaNs, (4) the default generated quiet NaNs, and (5) how NaNs > -| are propagated from function inputs to output. These details are target- > -| specific. > +| from quiet NaNs, and (4) how NaNs are propagated from function inputs to > +| output. These details are target-specific. > *----------------------------------------------------------------------------*/ > #include "softfloat-specialize.h" > > diff --git a/fpu/softfloat.h b/fpu/softfloat.h > index 5eff085..c9e4446 100644 > --- a/fpu/softfloat.h > +++ b/fpu/softfloat.h > @@ -43,7 +43,7 @@ these four paragraphs for those parts of this code that are retained. > #endif > > #include > -#include "config.h" > +#include "config-host.h" > > /*---------------------------------------------------------------------------- > | Each of the following `typedef's defines the most convenient type that holds > @@ -68,12 +68,6 @@ typedef int64_t int64; > #define LIT64( a ) a##LL > #define INLINE static inline > > -#if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) > -#define SNAN_BIT_IS_ONE 1 > -#else > -#define SNAN_BIT_IS_ONE 0 > -#endif > - > /*---------------------------------------------------------------------------- > | The macro `FLOATX80' must be defined to enable the extended double-precision > | floating-point format `floatx80'. If this macro is not defined, the > @@ -280,17 +274,6 @@ int float16_is_signaling_nan( float16 ); > float16 float16_maybe_silence_nan( float16 ); > > /*---------------------------------------------------------------------------- > -| The pattern for a default generated half-precision NaN. > -*----------------------------------------------------------------------------*/ > -#if defined(TARGET_ARM) > -#define float16_default_nan make_float16(0x7E00) > -#elif SNAN_BIT_IS_ONE > -#define float16_default_nan make_float16(0x7DFF) > -#else > -#define float16_default_nan make_float16(0xFE00) > -#endif > - > -/*---------------------------------------------------------------------------- > | Software IEC/IEEE single-precision conversion routines. > *----------------------------------------------------------------------------*/ > int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM ); > @@ -393,19 +376,6 @@ INLINE float32 float32_set_sign(float32 a, int sign) > > > /*---------------------------------------------------------------------------- > -| The pattern for a default generated single-precision NaN. > -*----------------------------------------------------------------------------*/ > -#if defined(TARGET_SPARC) > -#define float32_default_nan make_float32(0x7FFFFFFF) > -#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) > -#define float32_default_nan make_float32(0x7FC00000) > -#elif SNAN_BIT_IS_ONE > -#define float32_default_nan make_float32(0x7FBFFFFF) > -#else > -#define float32_default_nan make_float32(0xFFC00000) > -#endif > - > -/*---------------------------------------------------------------------------- > | Software IEC/IEEE double-precision conversion routines. > *----------------------------------------------------------------------------*/ > int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM ); > @@ -504,19 +474,6 @@ INLINE float64 float64_set_sign(float64 a, int sign) > #define float64_half make_float64(0x3fe0000000000000LL) > #define float64_infinity make_float64(0x7ff0000000000000LL) > > -/*---------------------------------------------------------------------------- > -| The pattern for a default generated double-precision NaN. > -*----------------------------------------------------------------------------*/ > -#if defined(TARGET_SPARC) > -#define float64_default_nan make_float64(LIT64( 0x7FFFFFFFFFFFFFFF )) > -#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) > -#define float64_default_nan make_float64(LIT64( 0x7FF8000000000000 )) > -#elif SNAN_BIT_IS_ONE > -#define float64_default_nan make_float64(LIT64( 0x7FF7FFFFFFFFFFFF )) > -#else > -#define float64_default_nan make_float64(LIT64( 0xFFF8000000000000 )) > -#endif > - > #ifdef FLOATX80 > > /*---------------------------------------------------------------------------- > @@ -596,19 +553,6 @@ INLINE int floatx80_is_any_nan(floatx80 a) > #define floatx80_half make_floatx80(0x3ffe, 0x8000000000000000LL) > #define floatx80_infinity make_floatx80(0x7fff, 0x8000000000000000LL) > > -/*---------------------------------------------------------------------------- > -| The pattern for a default generated extended double-precision NaN. The > -| `high' and `low' values hold the most- and least-significant bits, > -| respectively. > -*----------------------------------------------------------------------------*/ > -#if SNAN_BIT_IS_ONE > -#define floatx80_default_nan_high 0x7FFF > -#define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF ) > -#else > -#define floatx80_default_nan_high 0xFFFF > -#define floatx80_default_nan_low LIT64( 0xC000000000000000 ) > -#endif > - > #endif > > #ifdef FLOAT128 > @@ -684,18 +628,6 @@ INLINE int float128_is_any_nan(float128 a) > ((a.low != 0) || ((a.high & 0xffffffffffffLL) != 0)); > } > > -/*---------------------------------------------------------------------------- > -| The pattern for a default generated quadruple-precision NaN. The `high' and > -| `low' values hold the most- and least-significant bits, respectively. > -*----------------------------------------------------------------------------*/ > -#if SNAN_BIT_IS_ONE > -#define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF ) > -#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF ) > -#else > -#define float128_default_nan_high LIT64( 0xFFFF800000000000 ) > -#define float128_default_nan_low LIT64( 0x0000000000000000 ) > -#endif > - > #endif > > #else /* CONFIG_SOFTFLOAT */ > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 62ae72e..0f15cf3 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -8,6 +8,7 @@ > #include "helper.h" > #include "qemu-common.h" > #include "host-utils.h" > +#include "softfloat-target.h" > #if !defined(CONFIG_USER_ONLY) > #include "hw/loader.h" > #endif > -- > 1.7.4.4 > > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net