From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Roedel, Joerg" Subject: Re: kvm PCI assignment & VFIO ramblings Date: Mon, 22 Aug 2011 14:36:51 +0200 Message-ID: <20110822123651.GD2079@amd.com> References: <1312308847.2653.467.camel@bling.home> <1312310121.2653.470.camel@bling.home> <20110803020422.GF29719@yookeroo.fritz.box> <4E3F9E33.5000706@redhat.com> <1312932258.4524.55.camel@bling.home> <1312944513.29273.28.camel@pasglop> <1313859105.6866.192.camel@x201.home> <4E51F782.7060005@redhat.com> <20110822104635.GC2079@amd.com> <4E5234B7.7000700@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Cc: Alex Williamson , chrisw , Alexey Kardashevskiy , "kvm@vger.kernel.org" , Paul Mackerras , Benjamin Herrenschmidt , qemu-devel , iommu , Anthony Liguori , "linux-pci@vger.kernel.org" , linuxppc-dev , "benve@cisco.com" To: Avi Kivity Return-path: Content-Disposition: inline In-Reply-To: <4E5234B7.7000700@redhat.com> Sender: linux-pci-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On Mon, Aug 22, 2011 at 06:51:35AM -0400, Avi Kivity wrote: > On 08/22/2011 01:46 PM, Joerg Roedel wrote: > > That does not work. The bridge in question may not even be visible as a > > PCI device, so you can't link to it. This is the case on a few PCIe > > cards which only have a PCIx chip and a PCIe-2-PCIx bridge to implement > > the PCIe interface (yes, I have seen those cards). > > How does the kernel detect that devices behind the invisible bridge must > be assigned as a unit? On the AMD IOMMU side this information is stored in the IVRS ACPI table. Not sure about the VT-d side, though. Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from TX2EHSOBE005.bigfish.com (tx2ehsobe003.messaging.microsoft.com [65.55.88.13]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 18E05B6F65 for ; Mon, 22 Aug 2011 22:40:02 +1000 (EST) Date: Mon, 22 Aug 2011 14:36:51 +0200 From: "Roedel, Joerg" To: Avi Kivity Subject: Re: kvm PCI assignment & VFIO ramblings Message-ID: <20110822123651.GD2079@amd.com> References: <1312308847.2653.467.camel@bling.home> <1312310121.2653.470.camel@bling.home> <20110803020422.GF29719@yookeroo.fritz.box> <4E3F9E33.5000706@redhat.com> <1312932258.4524.55.camel@bling.home> <1312944513.29273.28.camel@pasglop> <1313859105.6866.192.camel@x201.home> <4E51F782.7060005@redhat.com> <20110822104635.GC2079@amd.com> <4E5234B7.7000700@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" In-Reply-To: <4E5234B7.7000700@redhat.com> Cc: Alexey Kardashevskiy , "kvm@vger.kernel.org" , Paul Mackerras , qemu-devel , iommu , chrisw , Alex Williamson , Anthony Liguori , "linux-pci@vger.kernel.org" , linuxppc-dev , "benve@cisco.com" List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Mon, Aug 22, 2011 at 06:51:35AM -0400, Avi Kivity wrote: > On 08/22/2011 01:46 PM, Joerg Roedel wrote: > > That does not work. The bridge in question may not even be visible as a > > PCI device, so you can't link to it. This is the case on a few PCIe > > cards which only have a PCIx chip and a PCIe-2-PCIx bridge to implement > > the PCIe interface (yes, I have seen those cards). > > How does the kernel detect that devices behind the invisible bridge must > be assigned as a unit? On the AMD IOMMU side this information is stored in the IVRS ACPI table. Not sure about the VT-d side, though. Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:47561) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QvUGR-0001CS-OU for qemu-devel@nongnu.org; Mon, 22 Aug 2011 09:10:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QvUGQ-0008Jv-Qt for qemu-devel@nongnu.org; Mon, 22 Aug 2011 09:10:03 -0400 Received: from tx2ehsobe003.messaging.microsoft.com ([65.55.88.13]:4122 helo=TX2EHSOBE005.bigfish.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QvUGQ-0008Jr-MO for qemu-devel@nongnu.org; Mon, 22 Aug 2011 09:10:02 -0400 Date: Mon, 22 Aug 2011 14:36:51 +0200 From: "Roedel, Joerg" Message-ID: <20110822123651.GD2079@amd.com> References: <1312308847.2653.467.camel@bling.home> <1312310121.2653.470.camel@bling.home> <20110803020422.GF29719@yookeroo.fritz.box> <4E3F9E33.5000706@redhat.com> <1312932258.4524.55.camel@bling.home> <1312944513.29273.28.camel@pasglop> <1313859105.6866.192.camel@x201.home> <4E51F782.7060005@redhat.com> <20110822104635.GC2079@amd.com> <4E5234B7.7000700@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <4E5234B7.7000700@redhat.com> Subject: Re: [Qemu-devel] kvm PCI assignment & VFIO ramblings List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: Alexey Kardashevskiy , "kvm@vger.kernel.org" , Paul Mackerras , qemu-devel , iommu , chrisw , Alex Williamson , "linux-pci@vger.kernel.org" , linuxppc-dev , "benve@cisco.com" On Mon, Aug 22, 2011 at 06:51:35AM -0400, Avi Kivity wrote: > On 08/22/2011 01:46 PM, Joerg Roedel wrote: > > That does not work. The bridge in question may not even be visible as a > > PCI device, so you can't link to it. This is the case on a few PCIe > > cards which only have a PCIx chip and a PCIe-2-PCIx bridge to implement > > the PCIe interface (yes, I have seen those cards). > > How does the kernel detect that devices behind the invisible bridge must > be assigned as a unit? On the AMD IOMMU side this information is stored in the IVRS ACPI table. Not sure about the VT-d side, though. Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632