From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754042Ab1IRGb1 (ORCPT ); Sun, 18 Sep 2011 02:31:27 -0400 Received: from mail-iy0-f174.google.com ([209.85.210.174]:49872 "EHLO mail-iy0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752227Ab1IRGbV (ORCPT ); Sun, 18 Sep 2011 02:31:21 -0400 Date: Sun, 18 Sep 2011 00:21:44 -0600 From: Grant Likely To: Dave Martin Cc: "Cousson, Benoit" , Rob Herring , "marc.zyngier@arm.com" , "devicetree-discuss@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" , Rob Herring , Thomas Abraham , "jamie@jamieiles.com" , "shawn.guo@linaro.org" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH 5/5] ARM: gic: add OF based initialization Message-ID: <20110918062144.GF3523@ponder.secretlab.ca> References: <1316017900-19918-1-git-send-email-robherring2@gmail.com> <1316017900-19918-6-git-send-email-robherring2@gmail.com> <4E71CE5D.9030900@ti.com> <20110916160939.GA2100@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110916160939.GA2100@arm.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 16, 2011 at 05:09:39PM +0100, Dave Martin wrote: > For now, we express the mapping by putting an interrupt-map in the > core-tile DT, but this feels inelegant as well as wasteful -- expressing > "+ 32" using a table which is about 1K in size and duplicates that > information 43 times. > > Using a dedicated irq domain or a fake interrupt controller node to > encapsulate the motherboard interrupts feels like a cleaner approach, > but for now I'm not clear on the best way to do it. An irq nexus node would indeed be something to investigate for your particular case. Look for examples of interrupt-map. It is most often used for handling IRQ swizzling on PCI busses. g. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Grant Likely Subject: Re: [PATCH 5/5] ARM: gic: add OF based initialization Date: Sun, 18 Sep 2011 00:21:44 -0600 Message-ID: <20110918062144.GF3523@ponder.secretlab.ca> References: <1316017900-19918-1-git-send-email-robherring2@gmail.com> <1316017900-19918-6-git-send-email-robherring2@gmail.com> <4E71CE5D.9030900@ti.com> <20110916160939.GA2100@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <20110916160939.GA2100-5wv7dgnIgG8@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org To: Dave Martin Cc: "devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Rob Herring , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" List-Id: devicetree@vger.kernel.org On Fri, Sep 16, 2011 at 05:09:39PM +0100, Dave Martin wrote: > For now, we express the mapping by putting an interrupt-map in the > core-tile DT, but this feels inelegant as well as wasteful -- expressing > "+ 32" using a table which is about 1K in size and duplicates that > information 43 times. > > Using a dedicated irq domain or a fake interrupt controller node to > encapsulate the motherboard interrupts feels like a cleaner approach, > but for now I'm not clear on the best way to do it. An irq nexus node would indeed be something to investigate for your particular case. Look for examples of interrupt-map. It is most often used for handling IRQ swizzling on PCI busses. g. From mboxrd@z Thu Jan 1 00:00:00 1970 From: grant.likely@secretlab.ca (Grant Likely) Date: Sun, 18 Sep 2011 00:21:44 -0600 Subject: [PATCH 5/5] ARM: gic: add OF based initialization In-Reply-To: <20110916160939.GA2100@arm.com> References: <1316017900-19918-1-git-send-email-robherring2@gmail.com> <1316017900-19918-6-git-send-email-robherring2@gmail.com> <4E71CE5D.9030900@ti.com> <20110916160939.GA2100@arm.com> Message-ID: <20110918062144.GF3523@ponder.secretlab.ca> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Sep 16, 2011 at 05:09:39PM +0100, Dave Martin wrote: > For now, we express the mapping by putting an interrupt-map in the > core-tile DT, but this feels inelegant as well as wasteful -- expressing > "+ 32" using a table which is about 1K in size and duplicates that > information 43 times. > > Using a dedicated irq domain or a fake interrupt controller node to > encapsulate the motherboard interrupts feels like a cleaner approach, > but for now I'm not clear on the best way to do it. An irq nexus node would indeed be something to investigate for your particular case. Look for examples of interrupt-map. It is most often used for handling IRQ swizzling on PCI busses. g.