From: Paul Mackerras <paulus@samba.org>
To: "Carl E. Love" <cel@linux.vnet.ibm.com>
Cc: linuxppc-dev@ozlabs.org, bherren@au1.ibm.com, pmac@au1.ibm.com
Subject: Re: [PATCH REPOST] perf event, POWER 6: L1 cache read and write access event code fix]
Date: Thu, 29 Sep 2011 14:06:30 +1000 [thread overview]
Message-ID: <20110929040630.GB28110@bloggs.ozlabs.ibm.com> (raw)
In-Reply-To: <1317245013.5461.11.camel@oc5652146517.ibm.com>
On Wed, Sep 28, 2011 at 02:23:33PM -0700, Carl E. Love wrote:
> The current L1 cache read event code 0x80082 only counts for thread 0. The
> event code 0x280030 should be used to count events on thread 0 and 1. The
> patch fixes the event code for the L1 cache read.
>
> The current L1 cache write event code 0x80086 only counts for thread 0. The
> event code 0x180032 should be used to count events on thread 0 and 1. The
> patch fixes the event code for the L1 cache write.
Acked-by: Paul Mackerras <paulus@samba.org>
next prev parent reply other threads:[~2011-09-29 4:06 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-28 21:23 [PATCH REPOST] perf event, POWER 6: L1 cache read and write access event code fix] Carl E. Love
2011-09-29 4:06 ` Paul Mackerras [this message]
2011-09-29 7:04 ` Benjamin Herrenschmidt
-- strict thread matches above, loose matches on Subject: below --
2011-09-23 23:45 Carl E. Love
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