From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:57140) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S8G2f-0007V2-GT for qemu-devel@nongnu.org; Thu, 15 Mar 2012 15:08:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S8G2c-0005P2-8N for qemu-devel@nongnu.org; Thu, 15 Mar 2012 15:08:53 -0400 Received: from relay1.mentorg.com ([192.94.38.131]:37642) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S8G2c-0005LP-2V for qemu-devel@nongnu.org; Thu, 15 Mar 2012 15:08:50 -0400 From: Paul Brook Date: Thu, 15 Mar 2012 19:08:44 +0000 References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331398436-20761-1-git-send-email-afaerber@suse.de> <1331398436-20761-9-git-send-email-afaerber@suse.de> In-Reply-To: <1331398436-20761-9-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201203151908.45065.paul@codesourcery.com> Subject: Re: [Qemu-devel] [PATCH RFC v4 08/20] target-arm: Store cp15 c0_c1 and c0_c2 in ARMCPUClass List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andreas =?utf-8?q?F=C3=A4rber?= Cc: Peter Maydell , qemu-devel@nongnu.org > For now set them in the reset function. > + /* TODO Move these into arm_cpu_initfn() once no longer zeroed above.*/ > + memcpy(env->cp15.c0_c1, klass->cp15.c0_c1, 8 * sizeof(uint32_t)); > + memcpy(env->cp15.c0_c2, klass->cp15.c0_c2, 8 * sizeof(uint32_t)); + Why bother copying them into the CPU state? These are readonly, so anything that needs them should be able to use the value straight from the class definitions. Paul