From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:37342) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S8GNS-0003ID-76 for qemu-devel@nongnu.org; Thu, 15 Mar 2012 15:30:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S8GNL-0007GX-TP for qemu-devel@nongnu.org; Thu, 15 Mar 2012 15:30:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41333) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S8GNL-0007Fg-Ko for qemu-devel@nongnu.org; Thu, 15 Mar 2012 15:30:15 -0400 Date: Thu, 15 Mar 2012 16:30:16 -0300 From: Eduardo Habkost Message-ID: <20120315193016.GE25451@otherpad.lan.raisama.net> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331747617-7837-1-git-send-email-afaerber@suse.de> <1331747617-7837-6-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: <1331747617-7837-6-git-send-email-afaerber@suse.de> Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC 05/12] target-i386: QOM'ify CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andreas =?iso-8859-1?Q?F=E4rber?= Cc: qemu-devel@nongnu.org On Wed, Mar 14, 2012 at 06:53:29PM +0100, Andreas F=E4rber wrote: [...] > +/** > + * X86CPUClass: > + * @parent_reset: The parent class' reset handler. > + * > + * An x86 CPU model or family. > + */ > +typedef struct X86CPUClass { > + /*< private >*/ > + CPUClass parent_class; > + /*< public >*/ > + > + void (*parent_reset)(CPUState *cpu); > + > + uint32_t level; > + uint32_t vendor1, vendor2, vendor3; > + int family; > + int model; > + int stepping; > + int tsc_khz; > + uint32_t features, ext_features, ext2_features, ext3_features; > + uint32_t kvm_features, svm_features; > + uint32_t xlevel; > + char model_id[48]; > + int vendor_override; > + uint32_t flags; > + /* Store the results of Centaur's CPUID instructions */ > + uint32_t ext4_features; > + uint32_t xlevel2; > +} X86CPUClass; [...] > +typedef struct X86CPUInfo { > + const char *name; > + uint32_t level; > + uint32_t vendor1, vendor2, vendor3; > + int family; > + int model; > + int stepping; > + int tsc_khz; > + uint32_t features, ext_features, ext2_features, ext3_features; > + uint32_t kvm_features, svm_features; > + uint32_t xlevel; > + char model_id[48]; > + int vendor_override; > + uint32_t flags; > + /* Store the results of Centaur's CPUID instructions */ > + uint32_t ext4_features; > + uint32_t xlevel2; > +} X86CPUInfo; Have you considered eliminating this duplication and using a common struct for both cases? (either by using X86CPUClass for everything, or by embedding a common struct inside X86CPUClass) This would simplify (or even make unnecessary) the field-by-field copy on x86_cpu_class_init(). [...] > +static void x86_cpu_class_init(ObjectClass *klass, void *data) > +{ > + X86CPUClass *k =3D X86_CPU_CLASS(klass); > + const X86CPUInfo *info =3D data; > + > + k->level =3D info->level; > + k->vendor1 =3D info->vendor1; > + k->vendor2 =3D info->vendor2; > + k->vendor3 =3D info->vendor3; > + k->family =3D info->family; > + k->model =3D info->model; > + k->stepping =3D info->stepping; > + k->tsc_khz =3D info->tsc_khz; > + k->features =3D info->features; > + k->ext_features =3D info->ext_features; > + k->ext2_features =3D info->ext2_features; > + k->ext3_features =3D info->ext3_features; > + k->kvm_features =3D info->kvm_features; > + k->svm_features =3D info->svm_features; > + k->xlevel =3D info->xlevel; > + memcpy(k->model_id, info->model_id, 48); > + k->vendor_override =3D info->vendor_override; > + k->flags =3D info->flags; > + k->ext4_features =3D info->ext4_features; > + k->xlevel2 =3D info->xlevel2; > +} --=20 Eduardo