From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 16/25] drm/i915: add ValleyView specific force wake get/put functions Date: Wed, 21 Mar 2012 22:11:25 +0100 Message-ID: <20120321211125.GH9913@phenom.ffwll.local> References: <1332359326-15051-1-git-send-email-jbarnes@virtuousgeek.org> <1332359326-15051-17-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com [209.85.212.177]) by gabe.freedesktop.org (Postfix) with ESMTP id C1E6F9ED63 for ; Wed, 21 Mar 2012 14:10:42 -0700 (PDT) Received: by wibhj13 with SMTP id hj13so1564617wib.12 for ; Wed, 21 Mar 2012 14:10:41 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1332359326-15051-17-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Mar 21, 2012 at 12:48:37PM -0700, Jesse Barnes wrote: > ValleyView handles force wake differently than previous chipsets, so add > a couple of new functions for it. > > But it's also untested, so no need to call these untested functions yet. > > Signed-off-by: Jesse Barnes So we have forcewake but we don't need forcewak?! Can you explain how this works for dense me a bit? -Daniel > --- > drivers/gpu/drm/i915/i915_drv.c | 28 +++++++++++++++++++++++++++- > drivers/gpu/drm/i915/i915_drv.h | 3 +++ > drivers/gpu/drm/i915/i915_reg.h | 2 ++ > drivers/gpu/drm/i915/intel_display.c | 2 ++ > 4 files changed, 34 insertions(+), 1 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index b83a0dc..e4fa294 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -462,6 +462,31 @@ int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv) > return ret; > } > > +void vlv_force_wake_get(struct drm_i915_private *dev_priv) > +{ > + int count; > + > + count = 0; > + > + /* Already awake? */ > + if ((I915_READ(0x130094) & 0xa1) == 0xa1) > + return; > + > + I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffffffff); > + POSTING_READ(FORCEWAKE_VLV); > + > + count = 0; > + while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & 1) == 0) > + udelay(10); > +} > + > +void vlv_force_wake_put(struct drm_i915_private *dev_priv) > +{ > + I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffff0000); > + /* FIXME: confirm VLV behavior with Punit folks */ > + POSTING_READ(FORCEWAKE_VLV); > +} > + > static int i915_drm_freeze(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = dev->dev_private; > @@ -1004,7 +1029,8 @@ MODULE_LICENSE("GPL and additional rights"); > #define NEEDS_FORCE_WAKE(dev_priv, reg) \ > (((dev_priv)->info->gen >= 6) && \ > ((reg) < 0x40000) && \ > - ((reg) != FORCEWAKE)) > + ((reg) != FORCEWAKE)) && \ > + (!IS_VALLEYVIEW((dev_priv)->dev)) > > #define __i915_read(x, y) \ > u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \ > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 2b8b32d..178a955 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1394,6 +1394,9 @@ extern void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv); > extern void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv); > extern void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv); > > +extern void vlv_force_wake_get(struct drm_i915_private *dev_priv); > +extern void vlv_force_wake_put(struct drm_i915_private *dev_priv); > + > /* overlay */ > #ifdef CONFIG_DEBUG_FS > extern struct intel_overlay_error_state *intel_overlay_capture_error_state(struct drm_device *dev); > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index f04bfbf..e9be070 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -3865,6 +3865,8 @@ > #define EDP_LINK_TRAIN_VOL_EMP_MASK_IVB (0x3f<<22) > > #define FORCEWAKE 0xA18C > +#define FORCEWAKE_VLV 0x1300b0 > +#define FORCEWAKE_ACK_VLV 0x1300b4 > #define FORCEWAKE_ACK 0x130090 > #define FORCEWAKE_MT 0xa188 /* multi-threaded */ > #define FORCEWAKE_MT_ACK 0x130040 > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index efb6465..6e6f8b0 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -9433,6 +9433,8 @@ static void intel_init_display(struct drm_device *dev) > dev_priv->display.update_wm = valleyview_update_wm; > dev_priv->display.init_clock_gating = > valleyview_init_clock_gating; > + dev_priv->display.force_wake_get = vlv_force_wake_get; > + dev_priv->display.force_wake_put = vlv_force_wake_put; > } else if (IS_PINEVIEW(dev)) { > if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev), > dev_priv->is_ddr3, > -- > 1.7.5.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48