From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 04/37] drm/i915: add haswell into the PCH SPLIT company Date: Thu, 22 Mar 2012 10:59:40 +0100 Message-ID: <20120322095939.GC6195@phenom.ffwll.local> References: <1332378612-3814-1-git-send-email-eugeni.dodonov@intel.com> <1332378612-3814-5-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wi0-f169.google.com (mail-wi0-f169.google.com [209.85.212.169]) by gabe.freedesktop.org (Postfix) with ESMTP id 2856E9E8DC for ; Thu, 22 Mar 2012 02:58:55 -0700 (PDT) Received: by wibhm17 with SMTP id hm17so430934wib.0 for ; Thu, 22 Mar 2012 02:58:55 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1332378612-3814-5-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Eugeni Dodonov Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Mar 21, 2012 at 10:09:39PM -0300, Eugeni Dodonov wrote: > Haswell is similar to Ivy Bridge in this sense. > > Signed-off-by: Eugeni Dodonov Given that vlv is gen7, too, but not pch_split, I think it's time to promote this into a feature flag. We use this at tons of places, so the added indirection imo isn't too bad. -Daniel > --- > drivers/gpu/drm/i915/i915_drv.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index fb50c42..51e04ec 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1047,7 +1047,7 @@ struct drm_i915_file_private { > #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr) > #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc) > > -#define HAS_PCH_SPLIT(dev) (IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev)) > +#define HAS_PCH_SPLIT(dev) (IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) > #define HAS_PLL_SPLIT(dev) (IS_IVYBRIDGE(dev)) > #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5) > > -- > 1.7.9.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48