[RFC] algorithm for handling bad cachelines

[Ben Widawsky <ben@bwidawsk.net>]

I wanted to run this by folks before I start doing any actual work.

This is primarily for GPGPU, or perhaps *really* accurate rendering
requirements.

IVB+ has an interrupt to tell us when a cacheline seems to be going bad.
There is also a mechanism to remap the bad cachelines. The
implementation details aren't quite clear to me yet, but I'd like to
enable this feature for userspace.

Here is my current plan, but it involves filesystem access, so it's
probably going to get a lot of flames.

1. Handle cache line going bad interrupt.
<After n number of these interrupts to the same line,>
2. send a uevent
2.5 reset the GPU (docs tell us to)
<On module load>
3. Read  a module parameter with a path in the filesystem
of the list of bad lines. It's not clear to me yet exactly what I need
to store, but it should be a relatively simple list.
4. Parse list on driver load, and handle as necessary.
5. goto 1.

Probably the biggest unanswered question is exactly when in the HW
loading do we have to finish remapping. If it can happen at any time
while the card is running, I don't need the filesystem stuff, but I
believe I need to remap the lines quite early in the device bootstrap.

The only alternative I have is a huge comma separated string for a
module parameter, but I kind of like reading the file better.

Any feedback is highly appreciated. I couldn't really find much
precedent for doing this in other drivers, so pointers to similar
things would also be highly welcome.

Ben