From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44701) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SEt5n-00080H-8m for qemu-devel@nongnu.org; Mon, 02 Apr 2012 22:03:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SEt5j-00016F-Ry for qemu-devel@nongnu.org; Mon, 02 Apr 2012 22:03:30 -0400 Received: from mx1.chubb.wattle.id.au ([128.177.28.167]:48762) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SEt5j-000158-Nf for qemu-devel@nongnu.org; Mon, 02 Apr 2012 22:03:27 -0400 Message-Id: <20120403015515.871951738@nicta.com.au> Date: Tue, 03 Apr 2012 11:55:15 +1000 From: Peter Chubb Subject: [Qemu-devel] [patch V5 0/5] i.MX31 support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , qemu-devel@nongnu.org Cc: Paolo Bonzini , Paul Brook This is the fifth round of patches for preliminary Freescale i.MX31 support. The only changes in the patches for imx UART and AVIC are the CamelCasing of the typedef names, and removal of unwanted #include files. The major change has been in the timer implementation. I've added a partial implementation of the clock control module, so that Linux gets the frequency of the clocks right, and totally reimplemented the general-purpose timer in terms of QEMU ptimers. This meant a small change to the board-level file, hw/kzm.c so that the timers could know about the CCM. I've tested the result with Linux 3.3.0 and a variety of unit tests. DVFS is still not implemented; but apart from that, timer ticks seem to come at around the right rate, and the timer values when read are sane. -- Dr Peter Chubb peter.chubb AT nicta.com.au http://www.ssrg.nicta.com.au Software Systems Research Group/NICTA