From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: [PATCH 2/7] drm/i915: implement a media hang w/a Date: Tue, 10 Apr 2012 14:34:24 -0700 Message-ID: <20120410213424.GA21080@bolo_yeung.jf.intel.com> References: <1333185723-5047-1-git-send-email-daniel.vetter@ffwll.ch> <1333185723-5047-3-git-send-email-daniel.vetter@ffwll.ch> <20120410213019.GA20801@bolo_yeung.jf.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from cloud01.chad-versace.us (184-106-247-128.static.cloud-ips.com [184.106.247.128]) by gabe.freedesktop.org (Postfix) with ESMTP id 625639F5DB for ; Tue, 10 Apr 2012 14:34:55 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20120410213019.GA20801@bolo_yeung.jf.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Tue, Apr 10, 2012 at 02:30:20PM -0700, Ben Widawsky wrote: > On Sat, Mar 31, 2012 at 11:21:58AM +0200, Daniel Vetter wrote: > > Contrary to the other clock gating w/a in GEN6_UCGCTL1, this one is > > actually documented in Bspec, vol1g "GT Interface Registers [SNB]", > > Section 1.5.1 "UCGCTL1 - Unit Level Clock Gating Control 1". > > > > Supposedly this can prevent hangs on the media ring. > > > > Signed-Off-by: Daniel Vetter > > --- > > According to my bspec, this is IVB A0 only. ie. nobody should ever need > this. My bad... needed on SNB only, and not IVB.