From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 1/7] drm/i915: implement ColorBlt w/a
Date: Wed, 11 Apr 2012 12:18:33 +0200
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To: Ben Widawsky <ben@bwidawsk.net>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>
List-Id: intel-gfx@lists.freedesktop.org

On Tue, Apr 10, 2012 at 03:24:13PM -0700, Ben Widawsky wrote:
> On Sat, Mar 31, 2012 at 11:21:57AM +0200, Daniel Vetter wrote:
> > According to an internal workaround master list, we need to set bit 5
> > of register 9400 to avoid issues with color blits.
> > 
> > Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> I'm having a lot of trouble actually tracking this one down in something
> other than the magical spreadsheet.
> 
> So I'll for now, this is only
> Acked-by: Ben Widawsky <ben@bwidawsk.net>
I've picked this up for -fixes, thanks for wrestling through hsd and that
ugly xls.
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48