From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 15/29] drm/i915: do not enable PCH PLL on pre-haswell Date: Mon, 16 Apr 2012 01:52:49 +0200 Message-ID: <20120415235249.GF3982@phenom.ffwll.local> References: <1334347745-11743-1-git-send-email-eugeni.dodonov@intel.com> <1334347745-11743-16-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 4B9C49E738 for ; Sun, 15 Apr 2012 16:51:54 -0700 (PDT) Received: by wgbdr12 with SMTP id dr12so3860427wgb.12 for ; Sun, 15 Apr 2012 16:51:53 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1334347745-11743-16-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Eugeni Dodonov Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Apr 13, 2012 at 05:08:51PM -0300, Eugeni Dodonov wrote: > Signed-off-by: Eugeni Dodonov > --- > drivers/gpu/drm/i915/intel_display.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 0768f48..e4ebd39 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1437,8 +1437,9 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv, > /* PCH only available on ILK+ */ > BUG_ON(dev_priv->info->gen < 5); > > - /* Make sure PCH DPLL is enabled */ > - assert_pch_pll_enabled(dev_priv, pipe); > + /* Make sure PCH DPLL is enabled on Pre-Haswell platforms */ > + if (!IS_HASWELL(dev_priv->dev)) > + assert_pch_pll_enabled(dev_priv, pipe); If I read the code correctly, you can drop this one with the follow-up patch to correctly detect which ports are driven through the pch in intel_crtc_driving_pch. I'm having a feeling there are other places where we should exploit this and could drop an IS_HSW check, but I'm too tired to check right now ;-) -Daniel > > /* FDI must be feeding us bits for PCH ports */ > assert_fdi_tx_enabled(dev_priv, pipe); > -- > 1.7.10 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48