[U-Boot] [PATCH v3] Add support for MINI2440 (s3c2440). Documentation about the product can be found on: http://www.friendlyarm.net/products/mini2440

[Gabriel Huau <contact@huau-gabriel.fr>]

On Thu, Apr 19, 2012 at 10:45:21PM +0200, Marek Vasut wrote:
> Dear Gabriel Huau,
> 
> > On Thu, Apr 19, 2012 at 10:08:47PM +0200, Marek Vasut wrote:
> > > Dear Gabriel Huau,
> > > 
> > > > ---
> > > > 
> > > > Changes for v2:
> > > > 	- Coding style cleanup
> > > > 	- Remove unnecessary files modification
> > > > 	- Remove unnecessary board configuration set
> > > > 
> > > > Changes for v3:
> > > > 	- Coding style cleanup
> > > > 	- Move some macro definition from lowlevel_init.S
> > > > 	to a new header
> > > > 	- Remove some "magic bloat" with I/O board initialization
> > > > 	- Add a pll_delay and replace loop by it
> > > > 	- Somme cleanup in the configuration file
> > > > 	- Cancel modifications on an SoC specific header
> > > > 	- Add my name to copyright
> > > > 
> > > > ---
> > > > 
> > > >  board/friendlyarm/mini2440/Makefile        |   45 ++++++
> > > >  board/friendlyarm/mini2440/lowlevel_init.S |   76 ++++++++++
> > > >  board/friendlyarm/mini2440/mini2440.c      |  139 ++++++++++++++++++
> > > >  board/friendlyarm/mini2440/mini2440.h      |  104 ++++++++++++++
> > > >  boards.cfg                                 |    1 +
> > > >  include/configs/mini2440.h                 |  215
> > > > 
> > > > ++++++++++++++++++++++++++++ 6 files changed, 580 insertions(+)
> > > > 
> > > >  create mode 100644 board/friendlyarm/mini2440/Makefile
> > > >  create mode 100644 board/friendlyarm/mini2440/lowlevel_init.S
> > > >  create mode 100644 board/friendlyarm/mini2440/mini2440.c
> > > >  create mode 100644 board/friendlyarm/mini2440/mini2440.h
> > > >  create mode 100644 include/configs/mini2440.h
> > > > 
> > > > diff --git a/board/friendlyarm/mini2440/Makefile
> > > > b/board/friendlyarm/mini2440/Makefile new file mode 100644
> > > > index 0000000..e8d68cb
> > > > --- /dev/null
> > > > +++ b/board/friendlyarm/mini2440/Makefile
> > > > @@ -0,0 +1,45 @@
> > > > +#
> > > > +# (C) Copyright 2012
> > > > +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> > > > +#
> > > > +# See file CREDITS for list of people who contributed to this
> > > > +# project.
> > > > +#
> > > > +# This program is free software; you can redistribute it and/or
> > > > +# modify it under the terms of the GNU General Public License as
> > > > +# published by the Free Software Foundation; either version 2 of
> > > > +# the License, or (at your option) any later version.
> > > > +#
> > > > +# This program is distributed in the hope that it will be useful,
> > > > +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > > > +# GNU General Public License for more details.
> > > > +#
> > > > +# You should have received a copy of the GNU General Public License
> > > > +# along with this program; if not, write to the Free Software
> > > > +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > > > +# MA 02111-1307 USA
> > > > +#
> > > > +
> > > > +include $(TOPDIR)/config.mk
> > > > +
> > > > +LIB	= $(obj)lib$(BOARD).o
> > > > +
> > > > +COBJS	:= mini2440.o
> > > > +SOBJS	:= lowlevel_init.o
> > > > +
> > > > +SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
> > > > +OBJS	:= $(addprefix $(obj),$(COBJS))
> > > > +SOBJS	:= $(addprefix $(obj),$(SOBJS))
> > > > +
> > > > +$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
> > > > +	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
> > > > +
> > > > +######################################################################
> > > > ### +
> > > > +# defines $(obj).depend target
> > > > +include $(SRCTREE)/rules.mk
> > > > +
> > > > +sinclude $(obj).depend
> > > > +
> > > > +######################################################################
> > > > ### diff --git a/board/friendlyarm/mini2440/lowlevel_init.S
> > > > b/board/friendlyarm/mini2440/lowlevel_init.S new file mode 100644
> > > > index 0000000..f69a08c
> > > > --- /dev/null
> > > > +++ b/board/friendlyarm/mini2440/lowlevel_init.S
> > > > @@ -0,0 +1,76 @@
> > > > +/*
> > > > + * Memory Setup stuff - taken from blob memsetup.S
> > > > + *
> > > > + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl)
> > > > and + *                     Jan-Derk Bakker
> > > > (J.D.Bakker at its.tudelft.nl) + *
> > > > + * Modified for the Samsung SMDK2410 by
> > > > + * (C) Copyright 2002
> > > > + * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
> > > > + *
> > > > + * (C) Copyright 2012
> > > > + * Gabriel Huau <contact@huau-gabriel.fr>
> > > > + *
> > > > + * See file CREDITS for list of people who contributed to this
> > > > + * project.
> > > > + *
> > > > + * This program is free software; you can redistribute it and/or
> > > > + * modify it under the terms of the GNU General Public License as
> > > > + * published by the Free Software Foundation; either version 2 of
> > > > + * the License, or (at your option) any later version.
> > > > + *
> > > > + * This program is distributed in the hope that it will be useful,
> > > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > > > + * GNU General Public License for more details.
> > > > + *
> > > > + * You should have received a copy of the GNU General Public License
> > > > + * along with this program; if not, write to the Free Software
> > > > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > > > + * MA 02111-1307 USA
> > > > + */
> > > > +
> > > > +#include <config.h>
> > > > +#include <version.h>
> > > > +#include "mini2440.h"
> > > > +
> > > > +_TEXT_BASE:
> > > > +	.word	CONFIG_SYS_TEXT_BASE
> > > > +
> > > > +.globl lowlevel_init
> > > > +lowlevel_init:
> > > > +	/* memory control configuration */
> > > > +	/* make r0 relative the current location so that it */
> > > > +	/* reads SMRDATA out of FLASH rather than memory ! */
> > > > +	ldr     r0, =SMRDATA
> > > > +	ldr	r1, _TEXT_BASE
> > > > +	sub	r0, r0, r1
> > > > +	ldr	r1, =BWSCON	/* Bus Width Status Controller */
> > > > +	add     r2, r0, #13*4
> > > > +0:
> > > > +	ldr     r3, [r0], #4
> > > > +	str     r3, [r1], #4
> > > > +	cmp     r2, r0
> > > > +	bne     0b
> > > > +
> > > > +	/* everything is fine now */
> > > > +	mov	pc, lr
> > > > +
> > > > +	.ltorg
> > > > +/* the literal pools origin */
> > > > +
> > > > +SMRDATA:
> > > > +    .word
> > > > (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BW
> > > > SCO N<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) +    .word
> > > > ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_
> > > > Tac p<<2)+(B0_PMC)) +    .word
> > > > ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_
> > > > Tac p<<2)+(B1_PMC)) +    .word
> > > > ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_
> > > > Tac p<<2)+(B2_PMC)) +    .word
> > > > ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_
> > > > Tac p<<2)+(B3_PMC)) +    .word
> > > > ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_
> > > > Tac p<<2)+(B4_PMC)) +    .word
> > > > ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_
> > > > Tac p<<2)+(B5_PMC)) +
> > > > +    .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
> > > > +    .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
> > > > +    .word
> > > > ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) +   
> > > > .word 0x32
> > > > +    .word 0x30
> > > > +    .word 0x30
> > > 
> > > What this undocumented stuff?
> > 
> > SoC specific, I pasted it from smdk2410, it's for initialize the DRAM.
> 
> Can't you init DRAM in some more fitting place? Also document this?
> 

I don't know, this part is a bit difficult for me, but I'm going to try
to document it with the help of the SoC documentation.

For the place, should I move it to mini2440.c in arch_cpu_init() or
board_early_init_f() ? I don't really know the difference.

> > > > diff --git a/board/friendlyarm/mini2440/mini2440.c
> > > > b/board/friendlyarm/mini2440/mini2440.c new file mode 100644
> > > > index 0000000..9ba8d39
> > > > --- /dev/null
> > > > +++ b/board/friendlyarm/mini2440/mini2440.c
> > > > @@ -0,0 +1,139 @@
> > > > +/*
> > > > + * (C) Copyright 2002
> > > > + * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
> > > > + * Marius Groeger <mgroeger@sysgo.de>
> > > > + *
> > > > + * (C) Copyright 2002
> > > > + * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
> > > > + *
> > > > + * (C) Copyright 2009
> > > > + * Michel Pollet <buserror@gmail.com>
> > > > + *
> > > > + * (C) Copyright 2012
> > > > + * Gabriel Huau <contact@huau-gabriel.fr>
> > > > + *
> > > > + * See file CREDITS for list of people who contributed to this
> > > > + * project.
> > > > + *
> > > > + * This program is free software; you can redistribute it and/or
> > > > + * modify it under the terms of the GNU General Public License as
> > > > + * published by the Free Software Foundation; either version 2 of
> > > > + * the License, or (at your option) any later version.
> > > > + *
> > > > + * This program is distributed in the hope that it will be useful,
> > > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > > > + * GNU General Public License for more details.
> > > > + *
> > > > + * You should have received a copy of the GNU General Public License
> > > > + * along with this program; if not, write to the Free Software
> > > > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > > > + * MA 02111-1307 USA
> > > > + */
> > > > +
> > > > +#include <common.h>
> > > > +#include <asm/arch/s3c2440.h>
> > > > +#include <asm/io.h>
> > > > +#include <video_fb.h>
> > > > +#include "mini2440.h"
> > > > +
> > > > +#ifdef CONFIG_DRIVER_DM9000
> > > > +#include <netdev.h>
> > > > +#endif
> > > > +
> > > > +DECLARE_GLOBAL_DATA_PTR;
> > > > +
> > > > +static inline void pll_delay(unsigned long loops)
> > > > +{
> > > > +	__asm__ volatile ("1:\n"
> > > > +	  "subs %0, %1, #1\n"
> > > > +	  "bne 1b" : "=r" (loops) : "0" (loops));
> > > > +}
> > > > +
> > > > +int arch_cpu_init(void)
> > > > +{
> > > > +	struct s3c24x0_clock_power * const clk_power =
> > > > +					s3c24x0_get_base_clock_power();
> > > > +
> > > > +	/* to reduce PLL lock time, adjust the LOCKTIME register */
> > > > +	clk_power->locktime = 0xFFFFFF;
> > > > +	clk_power->clkdivn = CLKDIVN_VAL;
> > > > +
> > > > +	/* configure UPLL */
> > > > +	clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
> > > > +	/* some delay between MPLL and UPLL */
> > > > +	pll_delay(100000);
> > > > +
> > > > +	/* configure MPLL */
> > > > +	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
> > > > +
> > > > +	/* some delay between MPLL and UPLL */
> > > > +	pll_delay(500000);
> > > 
> > > You use udelay() below, do you need pll_delay() at all?
> > 
> > Yes, because initialisation of PLL is done before timer_init(), so we
> > can't use udelay().
> 
> Maybe fix the timer driver?
> 

As PLL initialization is SoC specific, should I move it to
arch/arch/cpu/arm920t/s3c24x0/timer.c in timer_init() ?

With this modification, I will have to patch all board based 
on s3c24x0, because they are all using this "hack". Should this
modification be part of another patch ? (for me, yes ...)

> > > > +
> > > > +	return 0;
> > > > +}
> > > > +
> > > > +/*
> > > > + * Miscellaneous platform dependent initialisations
> > > > + */
> > > > +int board_init(void)
> > > > +{
> > > > +	struct s3c24x0_clock_power * const clk_power =
> > > > +					s3c24x0_get_base_clock_power();
> > > > +	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
> > > > +
> > > > +	/* to reduce PLL lock time, adjust the LOCKTIME register */
> > > > +	clk_power->locktime = 0xFFFFFF;
> > > > +	clk_power->clkdivn = CLKDIVN_VAL;
> > > > +
> > > > +	/* configure UPLL */
> > > > +	clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
> > > > +	/* some delay between MPLL and UPLL */
> > > > +	udelay(10);
> > > > +	/* configure MPLL */
> > > > +	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
> > > > +
> > > > +	/* some delay between MPLL and UPLL */
> > > > +	udelay(8000);
> > > > +
> > > > +	/* set up the I/O ports */
> > > > +	writel(0x007FFFFF, &gpio->gpacon);
> > > > +	writel(0x00044555, &gpio->gpbcon);
> > > > +	writel(0x000007FF, &gpio->gpbup);
> > > > +	writel(0xAAAAAAAA, &gpio->gpccon);
> > > > +	writel(0x0000FFFF, &gpio->gpcup);
> > > > +	writel(0xAAAAAAAA, &gpio->gpdcon);
> > > > +	writel(0x0000FFFF, &gpio->gpdup);
> > > > +	writel(0xAAAAAAAA, &gpio->gpecon);
> > > > +	writel(0x0000FFFF, &gpio->gpeup);
> > > > +	writel(0x000055AA, &gpio->gpfcon);
> > > > +	writel(0x000000FF, &gpio->gpfup);
> > > > +	writel(0xFF95FFBA, &gpio->gpgcon);
> > > > +	writel(0x0000FFFF, &gpio->gpgup);
> > > > +	writel(0x002AFAAA, &gpio->gphcon);
> > > > +	writel(0x000007FF, &gpio->gphup);
> > > > +
> > > > +	/* adress of boot parameters */
> > > > +	gd->bd->bi_boot_params = CONFIG_BOOT_PARAM_ADDR;
> > > > +
> > > > +	return 0;
> > > > +}
> > > > +
> > > > +int dram_init(void)
> > > > +{
> > > > +	gd->ram_size = PHYS_SDRAM_1_SIZE;
> > > > +	return 0;
> > > > +}
> > > > +
> > > > +int board_eth_init(bd_t *bis)
> > > > +{
> > > > +#ifdef CONFIG_DRIVER_DM9000
> > > > +	return dm9000_initialize(bis);
> > > > +#else
> > > > +	return 0;
> > > > +#endif
> > > > +}
> > > > +
> > > > +/* The sum of all part_size[]s must equal to the NAND size, i.e.,
> > > > 0x4000000 */ +unsigned int dynpart_size[] = { 0x40000, 0x20000,
> > > > 0x500000, 0xffffffff, 0 }; +char *dynpart_names[] = { "u-boot",
> > > > "u-boot_env", "kernel", "rootfs", NULL }; diff --git
> > > > a/board/friendlyarm/mini2440/mini2440.h
> > > > b/board/friendlyarm/mini2440/mini2440.h new file mode 100644
> > > > index 0000000..02197c8
> > > > --- /dev/null
> > > > +++ b/board/friendlyarm/mini2440/mini2440.h
> > > > @@ -0,0 +1,104 @@
> > > > +/*
> > > > + * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
> > > > + * Copyright (C) 2002 Samsung Electronics SW.LEE
> > > > <hitchcar@sec.samsung.com> + */
> > > > +
> > > > +#ifndef BOARD_LL_MINI2440_H
> > > > +#define BOARD_LL_MINI2440_H
> > > > +
> > > > +/*
> > > > + * PLL/Clock configuration
> > > > + */
> > > > +/* FCLK = 405 MHz, HCLK = 101 MHz, PCLK = 50 MHz, UCLK = 48 MHz */
> > > > +#define CLKDIVN_VAL	7
> > > > +#define M_MDIV		0x7f
> > > > +#define M_PDIV		0x2
> > > > +#define M_SDIV		0x1
> > > > +
> > > > +#define U_M_MDIV	0x38
> > > > +#define U_M_PDIV	0x2
> > > > +#define U_M_SDIV	0x2
> > > > +
> > > > +/* BWSCON */
> > > > +#define BWSCON	0x48000000
> > > > +#define DW8		(0x0)
> > > > +#define DW16	(0x1)
> > > > +#define DW32	(0x2)
> > > > +#define WAIT	(0x1<<2)
> > > > +#define UBLB	(0x1<<3)
> > > > +
> > > > +#define B1_BWSCON		(DW32)
> > > > +#define B2_BWSCON		(DW16)
> > > > +#define B3_BWSCON		(DW16 + WAIT + UBLB)
> > > > +#define B4_BWSCON		(DW16)
> > > > +#define B5_BWSCON		(DW16)
> > > > +#define B6_BWSCON		(DW32)
> > > > +#define B7_BWSCON		(DW32)
> > > > +
> > > > +/* BANK0CON */
> > > > +#define B0_Tacs		0x0	/*  0clk */
> > > > +#define B0_Tcos		0x0	/*  0clk */
> > > > +#define B0_Tacc		0x7	/* 14clk */
> > > > +#define B0_Tcoh		0x0	/*  0clk */
> > > > +#define B0_Tah		0x0	/*  0clk */
> > > > +#define B0_Tacp		0x0
> > > > +#define B0_PMC		0x0	/* normal */
> > > > +
> > > > +/* BANK1CON */
> > > > +#define B1_Tacs		0x0	/*  0clk */
> > > > +#define B1_Tcos		0x0	/*  0clk */
> > > > +#define B1_Tacc		0x7	/* 14clk */
> > > > +#define B1_Tcoh		0x0	/*  0clk */
> > > > +#define B1_Tah		0x0	/*  0clk */
> > > > +#define B1_Tacp		0x0
> > > > +#define B1_PMC		0x0
> > > > +
> > > > +#define B2_Tacs		0x0
> > > > +#define B2_Tcos		0x0
> > > > +#define B2_Tacc		0x7
> > > > +#define B2_Tcoh		0x0
> > > > +#define B2_Tah		0x0
> > > > +#define B2_Tacp		0x0
> > > > +#define B2_PMC		0x0
> > > > +
> > > > +#define B3_Tacs		0x0	/*  0clk */
> > > > +#define B3_Tcos		0x3	/*  4clk */
> > > > +#define B3_Tacc		0x7	/* 14clk */
> > > > +#define B3_Tcoh		0x1	/*  1clk */
> > > > +#define B3_Tah		0x0	/*  0clk */
> > > > +#define B3_Tacp		0x3     /*  6clk */
> > > > +#define B3_PMC		0x0	/* normal */
> > > > +
> > > > +#define B4_Tacs		0x0	/*  0clk */
> > > > +#define B4_Tcos		0x0	/*  0clk */
> > > > +#define B4_Tacc		0x7	/* 14clk */
> > > > +#define B4_Tcoh		0x0	/*  0clk */
> > > > +#define B4_Tah		0x0	/*  0clk */
> > > > +#define B4_Tacp		0x0
> > > > +#define B4_PMC		0x0	/* normal */
> > > > +
> > > > +#define B5_Tacs		0x0	/*  0clk */
> > > > +#define B5_Tcos		0x0	/*  0clk */
> > > > +#define B5_Tacc		0x7	/* 14clk */
> > > > +#define B5_Tcoh		0x0	/*  0clk */
> > > > +#define B5_Tah		0x0	/*  0clk */
> > > > +#define B5_Tacp		0x0
> > > > +#define B5_PMC		0x0	/* normal */
> > > > +
> > > > +#define B6_MT		0x3	/* SDRAM */
> > > > +#define B6_Trcd		0x1
> > > > +#define B6_SCAN		0x1	/* 9bit */
> > > > +
> > > > +#define B7_MT		0x3	/* SDRAM */
> > > > +#define B7_Trcd		0x1	/* 3clk */
> > > > +#define B7_SCAN		0x1	/* 9bit */
> > > > +
> > > > +/* REFRESH parameter */
> > > > +#define REFEN		0x1	/* Refresh enable */
> > > > +#define TREFMD		0x0	/* CBR(CAS before RAS)/Auto refresh */
> > > > +#define Trp			0x0	/* 2clk */
> > > > +#define Trc			0x3	/* 7clk */
> > > > +#define Tchr		0x2	/* 3clk */
> > > > +#define REFCNT		1113	/* period=15.6us, HCLK=60Mhz */
> > > > +
> > > > +#endif
> > > > diff --git a/boards.cfg b/boards.cfg
> > > > index 3cf75c3..93eeb3c 100644
> > > > --- a/boards.cfg
> > > > +++ b/boards.cfg
> > > > @@ -61,6 +61,7 @@ mx1ads                       arm         arm920t    
> > > > -
> > > > 
> > > >                - scb9328                      arm         arm920t     -
> > > >                -              imx cm4008                       arm
> > > > 
> > > > arm920t     -                   -              ks8695 cm41xx
> > > > 
> > > >         arm         arm920t     -                   -             
> > > >         ks8695
> > > > 
> > > > +mini2440                     arm         arm920t     mini2440
> > > > friendlyarm    s3c24x0 VCMA9                        arm         arm920t
> > > > 
> > > >  vcma9               mpl            s3c24x0 smdk2410
> > > > 
> > > > arm         arm920t     -                   samsung        s3c24x0
> > > > omap1510inn                  arm         arm925t     -
> > > > ti diff --git a/include/configs/mini2440.h b/include/configs/mini2440.h
> > > > new file mode 100644
> > > > index 0000000..a3f06d0
> > > > --- /dev/null
> > > > +++ b/include/configs/mini2440.h
> > > > @@ -0,0 +1,215 @@
> > > > +/*
> > > > + * (C) Copyright 2002
> > > > + * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
> > > > + * Marius Groeger <mgroeger@sysgo.de>
> > > > + * Gary Jennejohn <gj@denx.de>
> > > > + * David Mueller <d.mueller@elsoft.ch>
> > > > + *
> > > > + * (C) Copyright 2009-2010
> > > > + * Michel Pollet <buserror@gmail.com>
> > > > + *
> > > > + * (C) Copyright 2012
> > > > + * Gabriel Huau <contact@huau-gabriel.fr>
> > > > + *
> > > > + * Configuation settings for the MINI2440 board.
> > > > + *
> > > > + * See file CREDITS for list of people who contributed to this
> > > > + * project.
> > > > + *
> > > > + * This program is free software; you can redistribute it and/or
> > > > + * modify it under the terms of the GNU General Public License as
> > > > + * published by the Free Software Foundation; either version 2 of
> > > > + * the License, or (at your option) any later version.
> > > > + *
> > > > + * This program is distributed in the hope that it will be useful,
> > > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > > > + * GNU General Public License for more details.
> > > > + *
> > > > + * You should have received a copy of the GNU General Public License
> > > > + * along with this program; if not, write to the Free Software
> > > > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > > > + * MA 02111-1307 USA
> > > > + */
> > > > +
> > > > +#ifndef __CONFIG_H
> > > > +#define __CONFIG_H
> > > > +
> > > > +#define CONFIG_SYS_TEXT_BASE 0x0
> > > > +
> > > > +/*
> > > > + * High Level Configuration Options
> > > > + */
> > > > +#define CONFIG_ARM920T		1	/* This is an ARM920T Core
> > > 
> > > */
> > > 
> > > > +#define CONFIG_S3C24X0		1	/* in a SAMSUNG S3C2440 SoC */
> > > > +#define CONFIG_S3C2440		1	/* in a SAMSUNG S3C2440 SoC */
> > > > +#define CONFIG_MINI2440		1	/* on a MIN2440 Board       */
> > > > +
> > > > +#define	MACH_TYPE_MINI2440	1999
> > > > +#define	CONFIG_MACH_TYPE	MACH_TYPE_MINI2440
> > > > +
> > > > +/*
> > > > + * It is possible to have u-boot save it's environment in NOR,
> > > > however, + * reember it is incompatible with booting from NAND as the
> > > > NOR is not + * available at that point. So use this only if you use
> > > > nand as storage + * and will never boot from it
> > > > + */
> > > > +#define CONFIG_MINI2440_NOR_ENV	1
> > > > +/* allow use of frequencies over 405Mhz */
> > > > +#define CONFIG_MINI2440_OVERCLOCK 1
> > > > +
> > > > +/*
> > > > + * input clock of PLL
> > > > + */
> > > > +/* MINI2440 has 12.0000MHz input clock */
> > > > +#define CONFIG_SYS_CLK_FREQ	12000000
> > > > +#define CONFIG_ARCH_CPU_INIT 1 /* for the initialization of PLL */
> > > > +
> > > > +#define USE_920T_MMU		1
> > > > +#define CONFIG_BAUDRATE		115200
> > > > +
> > > > +/*
> > > > + * Size of malloc() pool
> > > > + */
> > > > +#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 2048*1024)
> > > > +/* size in bytes reserved for initial data */
> > > > +#define CONFIG_GBL_DATA_SIZE	128
> > > > +
> > > > +/*
> > > > + * Hardware drivers
> > > > + */
> > > > +#define CONFIG_DRIVER_DM9000			1
> > > > +#define CONFIG_DRIVER_DM9000_NO_EEPROM	1
> > > > +#define CONFIG_DM9000_BASE				0x20000300
> > > > +#define DM9000_IO		CONFIG_DM9000_BASE
> > > > +#define DM9000_DATA		(CONFIG_DM9000_BASE+4)
> > > > +
> > > > +/*
> > > > + * select serial console configuration
> > > > + */
> > > > +#define CONFIG_S3C24X0_SERIAL
> > > > +#define CONFIG_SERIAL1			1
> > > > +
> > > > +/*
> > > > + * allow to overwrite serial and ethaddr
> > > > + */
> > > > +#define CONFIG_ENV_OVERWRITE
> > > > +
> > > > +/*
> > > > + * Command definition
> > > > + */
> > > > +#include <config_cmd_default.h>
> > > > +
> > > > +#define CONFIG_CMD_DHCP
> > > > +#define CONFIG_CMD_PORTIO
> > > > +#define CONFIG_CMD_REGINFO
> > > > +#define CONFIG_CMD_SAVES
> > > > +
> > > > +/*
> > > > + * Miscellaneous configurable options
> > > > + */
> > > > +#define	CONFIG_LONGHELP
> > > > +#define	CONFIG_SYS_PROMPT		"MINI2440 => "
> > > > +#define	CONFIG_SYS_CBSIZE		256
> > > > +#define	CONFIG_SYS_PBSIZE
> > > 
> > > (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
> > > 
> > > > +#define	CONFIG_SYS_MAXARGS		32
> > > > +#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
> > > > +
> > > > +#define CONFIG_SYS_MEMTEST_START	0x30000000
> > > > +#define CONFIG_SYS_MEMTEST_END		0x34000000	/* 64MB in DRAM
> > > 
> > > */
> > > 
> > > > +
> > > > +/* everything, incl board info, in Hz */
> > > > +#undef  CONFIG_CLKS_IN_HZ
> > > > +
> > > > +/* default load address	*/
> > > > +#define	CONFIG_SYS_LOAD_ADDR		0x32000000
> > > > +
> > > > +/* boot parameters address */
> > > > +#define	CONFIG_BOOT_PARAM_ADDR		0x30000100
> > > > +
> > > > +/*
> > > > + * the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need
> > > > + * it to wrap 100 times (total 1562500) to get 1 sec.
> > > > + */
> > > > +#define	CONFIG_SYS_HZ			1562500
> > > > +
> > > > +/*
> > > > + * valid baudrates
> > > > + */
> > > > +#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 
> 115200
> > > > } +
> > > > +/*
> > > > + * Stack sizes
> > > > + * The stack sizes are set up in start.S using the settings below
> > > > + */
> > > > +#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
> > > > +#ifdef CONFIG_USE_IRQ
> > > > +#define CONFIG_STACKSIZE_IRQ	(8*1024)	/* IRQ stack */
> > > > +#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
> > > > +#endif
> > > > +
> > > > +/*
> > > > + * Physical Memory Map
> > > > + */
> > > > +#define CONFIG_NR_DRAM_BANKS        1          /* we have 1 bank of
> > > > DRAM */ +#define PHYS_SDRAM_1                0x30000000 /* SDRAM Bank
> > > > #1 */ +#define PHYS_SDRAM_1_SIZE           (64*1024*1024) /* 64MB of
> > > > DRAM */ +#define CONFIG_SYS_SDRAM_BASE       PHYS_SDRAM_1
> > > > +#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000
> > > 
> > > - \
> > > 
> > > > +							GENERATED_GBL_DATA_SIZE)
> > > > +
> > > > +/*
> > > > + * When booting from NAND, it is impossible to access the lowest
> > > > addresses + * due to the SteppingStone being in the way. Luckily the
> > > > NOR doesn't really + * care about the highest 16 bits of address, so
> > > > we set the controlers + * registers to go and poke over there,
> > > > instead.
> > > > + */
> > > > +#define PHYS_FLASH_1			0x0
> > > > +#define CONFIG_SYS_FLASH_BASE	0x0
> > > > +
> > > > +/*
> > > > + * NOR FLASH organization
> > > > + * Now uses the standard CFI interface
> > > > + * FLASH and environment organization
> > > > + */
> > > > +#define CONFIG_SYS_FLASH_CFI		1
> > > > +#define CONFIG_FLASH_CFI_DRIVER		1
> > > > +#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
> > > > +#define CONFIG_SYS_MONITOR_BASE		0x0
> > > > +/* max number of memory banks */
> > > > +#define CONFIG_SYS_MAX_FLASH_BANKS	1
> > > > +/* 512 * 4096 sectors, or 32 * 64k blocks */
> > > > +#define CONFIG_SYS_MAX_FLASH_SECT	512
> > > > +#define CONFIG_FLASH_SHOW_PROGRESS	1
> > > > +
> > > > +/*
> > > > + * u-boot environmnent
> > > > + */
> > > > +#define CONFIG_BOOTDELAY	3
> > > > +#define CONFIG_BOOTARGS		"root=/dev/sdb1 console=ttySAC0,115200"
> > > > +#define CONFIG_NETMASK      255.255.255.0
> > > > +#define CONFIG_IPADDR		192.168.0.2
> > > > +#define CONFIG_SERVERIP		192.168.0.1
> > > > +#define CONFIG_DOS_PARTITION	1
> > > > +#define CONFIG_BOOTCOMMAND "tftp 0x32000000 uImage;bootm"
> > > 
> > > DROP THIS!
> > 
> > ok :-)
> > 
> > > > +
> > > > +/*
> > > > + * Config for NOR flash
> > > > + */
> > > > +#define CONFIG_ENV_IS_IN_FLASH	1
> > > > +#define CONFIG_MY_ENV_OFFSET	0x40000
> > > > +/* addr of environment */
> > > > +#define CONFIG_ENV_ADDR		(PHYS_FLASH_1 + CONFIG_MY_ENV_OFFSET)
> > > > +/* 16k Total Size of Environment Sector */
> > > > +#define CONFIG_ENV_SIZE		0x4000
> > > > +
> > > > +#define CONFIG_PREBOOT_OVERRIDE	1
> > > > +
> > > > +/* ATAG configuration */
> > > > +#define CONFIG_INITRD_TAG			1
> > > > +#define CONFIG_SETUP_MEMORY_TAGS	1
> > > > +#define CONFIG_CMDLINE_TAG			1
> > > > +#define CONFIG_CMDLINE_EDITING		1
> > > > +#define CONFIG_AUTO_COMPLETE		1
> > > > +
> > > > +#endif	/* __CONFIG_H */