From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: implement Disable4x2SubspanOptimization w/a for ivb, too Date: Tue, 24 Apr 2012 18:26:04 +0200 Message-ID: <20120424162604.GC2017@phenom.ffwll.local> References: <1335276021-13593-1-git-send-email-daniel.vetter@ffwll.ch> <20120424085742.60993f33@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com [209.85.212.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 11617A0B09 for ; Tue, 24 Apr 2012 09:25:04 -0700 (PDT) Received: by wibhj13 with SMTP id hj13so682517wib.12 for ; Tue, 24 Apr 2012 09:25:04 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20120424085742.60993f33@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ben Widawsky Cc: Daniel Vetter , Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Tue, Apr 24, 2012 at 08:57:42AM -0700, Ben Widawsky wrote: > On Tue, 24 Apr 2012 16:00:21 +0200 > Daniel Vetter wrote: > > > Copy&pasted from the vlv setup code. According to docs, we need that > > on ivb, too. > > > > v2: Use new masked bit handling macros. > > > > Cc: Ben Widawsky > > Signed-Off-by: Daniel Vetter > Reviewed-by: Ben Widawsky Queued for -next, thanks for the review. -Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48