From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hiroshi Doyu Subject: Re: [PATCHv3 1/4] ARM: tegra: Add AHB driver Date: Wed, 25 Apr 2012 15:01:28 +0200 Message-ID: <20120425.160128.1314575000242024123.hdoyu@nvidia.com> References: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com><20120425112519.GB3564@arwen.pp.htv.fi> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7BIT Return-path: In-Reply-To: <20120425112519.GB3564-S8G//mZuvNWo5Im9Ml3/Zg@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: "balbi-l0cyMroinI0@public.gmane.org" , "linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org" Cc: Stephen Warren , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" , "arnd-r2nGTMty4D4@public.gmane.org" , "grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org" , "rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org" List-Id: linux-tegra@vger.kernel.org From: Felipe Balbi Subject: Re: [PATCHv3 1/4] ARM: tegra: Add AHB driver Date: Wed, 25 Apr 2012 13:25:20 +0200 Message-ID: <20120425112519.GB3564-S8G//mZuvNWo5Im9Ml3/Zg@public.gmane.org> > * PGP Signed by an unknown key > > On Wed, Apr 25, 2012 at 02:07:36PM +0300, Hiroshi DOYU wrote: > > The AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced > > High-performance Bus (AHB) architecture. > > > > The AHB Arbiter controls AHB bus master arbitration. This effectively > > forms a second level of arbitration for access to the memory > > controller through the AHB Slave Memory device. The AHB pre-fetch > > logic can be configured to enhance performance for devices doing > > sequential access. Each AHB master is assigned to either the high or > > low priority bin. Both Tegra20/30 have this AHB bus. > > > > Some of configuration param could be passed from DT too. > > > > Signed-off-by: Hiroshi DOYU > > Cc: Felipe Balbi > > Cc: Arnd Bergmann > > --- > > v4: > > Fixed the comments from Felipe/Russell. > > This is now located under drivers/platform/arm. > > v3: > > Use platform_device to get info from dt dynamically.(Felipe/Arnd) > > > > Signed-off-by: Hiroshi DOYU > > Just one thing, you seem to have missed Russell's comment about this > driver being generic. You still add a TEGRA_AHB driver, For generalization, there seems to be many parts in this driver depending on SoC implementation, and I'm not so sure how much S/W compatibility can be kept from H/W spec. Is there any other similar SoC AHB driver in kernel? > also, you don't need . Apart from those, you can add: Ok, I'll fix and add your Reviewed-by:. Thank you for your review. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755871Ab2DYNBn (ORCPT ); Wed, 25 Apr 2012 09:01:43 -0400 Received: from hqemgate03.nvidia.com ([216.228.121.140]:13365 "EHLO hqemgate03.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751754Ab2DYNBm convert rfc822-to-8bit (ORCPT ); Wed, 25 Apr 2012 09:01:42 -0400 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 25 Apr 2012 06:01:34 -0700 From: Hiroshi Doyu To: "balbi@ti.com" , "linux@arm.linux.org.uk" CC: Stephen Warren , "linux-tegra@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "arnd@arndb.de" , "grant.likely@secretlab.ca" , "rob.herring@calxeda.com" , "linux-kernel@vger.kernel.org" , "devicetree-discuss@lists.ozlabs.org" Date: Wed, 25 Apr 2012 15:01:28 +0200 Subject: Re: [PATCHv3 1/4] ARM: tegra: Add AHB driver Thread-Topic: [PATCHv3 1/4] ARM: tegra: Add AHB driver Thread-Index: Ac0i44elZw5fdqENQzCoNlKj29XYIQ== Message-ID: <20120425.160128.1314575000242024123.hdoyu@nvidia.com> References: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com><20120425112519.GB3564@arwen.pp.htv.fi> In-Reply-To: <20120425112519.GB3564@arwen.pp.htv.fi> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-nvconfidentiality: public acceptlanguage: en-US Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Felipe Balbi Subject: Re: [PATCHv3 1/4] ARM: tegra: Add AHB driver Date: Wed, 25 Apr 2012 13:25:20 +0200 Message-ID: <20120425112519.GB3564@arwen.pp.htv.fi> > * PGP Signed by an unknown key > > On Wed, Apr 25, 2012 at 02:07:36PM +0300, Hiroshi DOYU wrote: > > The AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced > > High-performance Bus (AHB) architecture. > > > > The AHB Arbiter controls AHB bus master arbitration. This effectively > > forms a second level of arbitration for access to the memory > > controller through the AHB Slave Memory device. The AHB pre-fetch > > logic can be configured to enhance performance for devices doing > > sequential access. Each AHB master is assigned to either the high or > > low priority bin. Both Tegra20/30 have this AHB bus. > > > > Some of configuration param could be passed from DT too. > > > > Signed-off-by: Hiroshi DOYU > > Cc: Felipe Balbi > > Cc: Arnd Bergmann > > --- > > v4: > > Fixed the comments from Felipe/Russell. > > This is now located under drivers/platform/arm. > > v3: > > Use platform_device to get info from dt dynamically.(Felipe/Arnd) > > > > Signed-off-by: Hiroshi DOYU > > Just one thing, you seem to have missed Russell's comment about this > driver being generic. You still add a TEGRA_AHB driver, For generalization, there seems to be many parts in this driver depending on SoC implementation, and I'm not so sure how much S/W compatibility can be kept from H/W spec. Is there any other similar SoC AHB driver in kernel? > also, you don't need . Apart from those, you can add: Ok, I'll fix and add your Reviewed-by:. Thank you for your review. From mboxrd@z Thu Jan 1 00:00:00 1970 From: hdoyu@nvidia.com (Hiroshi Doyu) Date: Wed, 25 Apr 2012 15:01:28 +0200 Subject: [PATCHv3 1/4] ARM: tegra: Add AHB driver In-Reply-To: <20120425112519.GB3564@arwen.pp.htv.fi> References: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com><20120425112519.GB3564@arwen.pp.htv.fi> Message-ID: <20120425.160128.1314575000242024123.hdoyu@nvidia.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Felipe Balbi Subject: Re: [PATCHv3 1/4] ARM: tegra: Add AHB driver Date: Wed, 25 Apr 2012 13:25:20 +0200 Message-ID: <20120425112519.GB3564@arwen.pp.htv.fi> > * PGP Signed by an unknown key > > On Wed, Apr 25, 2012 at 02:07:36PM +0300, Hiroshi DOYU wrote: > > The AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced > > High-performance Bus (AHB) architecture. > > > > The AHB Arbiter controls AHB bus master arbitration. This effectively > > forms a second level of arbitration for access to the memory > > controller through the AHB Slave Memory device. The AHB pre-fetch > > logic can be configured to enhance performance for devices doing > > sequential access. Each AHB master is assigned to either the high or > > low priority bin. Both Tegra20/30 have this AHB bus. > > > > Some of configuration param could be passed from DT too. > > > > Signed-off-by: Hiroshi DOYU > > Cc: Felipe Balbi > > Cc: Arnd Bergmann > > --- > > v4: > > Fixed the comments from Felipe/Russell. > > This is now located under drivers/platform/arm. > > v3: > > Use platform_device to get info from dt dynamically.(Felipe/Arnd) > > > > Signed-off-by: Hiroshi DOYU > > Just one thing, you seem to have missed Russell's comment about this > driver being generic. You still add a TEGRA_AHB driver, For generalization, there seems to be many parts in this driver depending on SoC implementation, and I'm not so sure how much S/W compatibility can be kept from H/W spec. Is there any other similar SoC AHB driver in kernel? > also, you don't need . Apart from those, you can add: Ok, I'll fix and add your Reviewed-by:. Thank you for your review.