From mboxrd@z Thu Jan 1 00:00:00 1970 From: Russell King - ARM Linux Subject: Re: [PATCHv3 1/4] ARM: tegra: Add AHB driver Date: Thu, 26 Apr 2012 22:59:03 +0100 Message-ID: <20120426215903.GH24211@n2100.arm.linux.org.uk> References: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com> <4F99A740.3080407@wwwdotorg.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <4F99A740.3080407-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org To: Stephen Warren Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Felipe Balbi , Rob Herring , linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Hiroshi DOYU List-Id: linux-tegra@vger.kernel.org On Thu, Apr 26, 2012 at 01:51:28PM -0600, Stephen Warren wrote: > On 04/25/2012 05:07 AM, Hiroshi DOYU wrote: > > The AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced > > High-performance Bus (AHB) architecture. > > > > The AHB Arbiter controls AHB bus master arbitration. This effectively > > forms a second level of arbitration for access to the memory > > controller through the AHB Slave Memory device. The AHB pre-fetch > > logic can be configured to enhance performance for devices doing > > sequential access. Each AHB master is assigned to either the high or > > low priority bin. Both Tegra20/30 have this AHB bus. > > > > Some of configuration param could be passed from DT too. > > I think this code looks reasonable. I'd like to see an ack from Russell, > Arnd, and Olof on the final location of the files though. Well, the big question which needs answering is whether this AHB software interface is something specific to Tegra or whether it really is something generic. There's been some hints in the previous thread that it's specific to Tegra, so it may not after all make sense for it to be a generic driver. However, we _have_ decided "no more drivers under arch/arm". So I really don't want to see "struct xxx_driver" appearing in any code under that subdirectory or one of its decendents. I don't have much more to say about location than that. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759314Ab2DZV7e (ORCPT ); Thu, 26 Apr 2012 17:59:34 -0400 Received: from caramon.arm.linux.org.uk ([78.32.30.218]:38145 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758735Ab2DZV7d (ORCPT ); Thu, 26 Apr 2012 17:59:33 -0400 Date: Thu, 26 Apr 2012 22:59:03 +0100 From: Russell King - ARM Linux To: Stephen Warren Cc: Hiroshi DOYU , swarren@nvidia.com, Arnd Bergmann , devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, Felipe Balbi , Grant Likely , Rob Herring , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCHv3 1/4] ARM: tegra: Add AHB driver Message-ID: <20120426215903.GH24211@n2100.arm.linux.org.uk> References: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com> <4F99A740.3080407@wwwdotorg.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4F99A740.3080407@wwwdotorg.org> User-Agent: Mutt/1.5.19 (2009-01-05) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 26, 2012 at 01:51:28PM -0600, Stephen Warren wrote: > On 04/25/2012 05:07 AM, Hiroshi DOYU wrote: > > The AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced > > High-performance Bus (AHB) architecture. > > > > The AHB Arbiter controls AHB bus master arbitration. This effectively > > forms a second level of arbitration for access to the memory > > controller through the AHB Slave Memory device. The AHB pre-fetch > > logic can be configured to enhance performance for devices doing > > sequential access. Each AHB master is assigned to either the high or > > low priority bin. Both Tegra20/30 have this AHB bus. > > > > Some of configuration param could be passed from DT too. > > I think this code looks reasonable. I'd like to see an ack from Russell, > Arnd, and Olof on the final location of the files though. Well, the big question which needs answering is whether this AHB software interface is something specific to Tegra or whether it really is something generic. There's been some hints in the previous thread that it's specific to Tegra, so it may not after all make sense for it to be a generic driver. However, we _have_ decided "no more drivers under arch/arm". So I really don't want to see "struct xxx_driver" appearing in any code under that subdirectory or one of its decendents. I don't have much more to say about location than that. From mboxrd@z Thu Jan 1 00:00:00 1970 From: linux@arm.linux.org.uk (Russell King - ARM Linux) Date: Thu, 26 Apr 2012 22:59:03 +0100 Subject: [PATCHv3 1/4] ARM: tegra: Add AHB driver In-Reply-To: <4F99A740.3080407@wwwdotorg.org> References: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com> <4F99A740.3080407@wwwdotorg.org> Message-ID: <20120426215903.GH24211@n2100.arm.linux.org.uk> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, Apr 26, 2012 at 01:51:28PM -0600, Stephen Warren wrote: > On 04/25/2012 05:07 AM, Hiroshi DOYU wrote: > > The AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced > > High-performance Bus (AHB) architecture. > > > > The AHB Arbiter controls AHB bus master arbitration. This effectively > > forms a second level of arbitration for access to the memory > > controller through the AHB Slave Memory device. The AHB pre-fetch > > logic can be configured to enhance performance for devices doing > > sequential access. Each AHB master is assigned to either the high or > > low priority bin. Both Tegra20/30 have this AHB bus. > > > > Some of configuration param could be passed from DT too. > > I think this code looks reasonable. I'd like to see an ack from Russell, > Arnd, and Olof on the final location of the files though. Well, the big question which needs answering is whether this AHB software interface is something specific to Tegra or whether it really is something generic. There's been some hints in the previous thread that it's specific to Tegra, so it may not after all make sense for it to be a generic driver. However, we _have_ decided "no more drivers under arch/arm". So I really don't want to see "struct xxx_driver" appearing in any code under that subdirectory or one of its decendents. I don't have much more to say about location than that.