On Thu, 26 Apr 2012 13:39:07 -0700 Kevin Hilman <khilman@ti.com> wrote:

> NeilBrown <neilb@suse.de> writes:
> 
> > All interrupts can wake-from-sleep (I think) so it should be
> > permissible to call enable_irq_wake().  Setting this flag allows that.
> >
> > It is needed because without this, an interrupt which is delivered
> > during late suspend will get ignored but will not cause suspend to
> > abort.
> > If enable_irq_wake() is called and succeeds, check_wakuep_irqs()
> > will abort the suspend if the interrupt has fired.
> >
> > Signed-off-by: NeilBrown <neilb@suse.de>
> 
> The name of this flag and the effect of setting it are somewhat
> confusing (e.g. why does skipping set_wake suddenly make wakeups work.)
> So I tried to make it clearer with a reworking of the changelog (below.)
> 
> If I understood this correctly, and if you're OK with the updated
> changelog, I'll queue this up for v3.5.
> 

I'm very OK with your updated changelog - thanks.  Filling in various bits
that I didn't know and clarifies the rest :-)

Thanks,
NeilBrown



> Thanks,
> 
> Kevin
> 
> >From 644742ddae59731bc10aacde94645d7c49ca5ecd Mon Sep 17 00:00:00 2001
> From: NeilBrown <neilb@suse.de>
> Date: Wed, 25 Apr 2012 13:05:24 +1000
> Subject: [PATCH] ARM: omap2+: set IRQCHIP_SKIP_SET_WAKE for INTC interrupts.
> 
> Without an ->irq_set_wake() method in an irq_chip, calls to
> enable_irq_wake() will fail.  This also causes these interrupts to not
> be able to abort suspend (via check_wakeup_irqs() in late suspend.)
> 
> Currently, we don't implement ->irq_set_wake() for INTC interrupts
> because they default to be wakeup enabled by setting the GRPSEL bits
> in PM init.  Even though there is no ->irq_set_wake(), we want
> enable_irq_wake() to succeed so these interrupts can abort suspend
> when necessary.
> 
> To fix, set IRQCHIP_SKIP_SET_WAKE flag for all the INTC
> interrupts which avoids trying to check irq_chip->irq_set_wake()
> and failing when it doesn't exist.
> 
> Longer term, we need to implement ->irq_set_wake() for the INTC
> which can manage the appropriate GRPSEL bits.
> 
> Signed-off-by: NeilBrown <neilb@suse.de>
> [khilman@ti.com: rework changelog]
> Signed-off-by: Kevin Hilman <khilman@ti.com>
> ---
>  arch/arm/mach-omap2/irq.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
> index 65f0d257..b0790a9 100644
> --- a/arch/arm/mach-omap2/irq.c
> +++ b/arch/arm/mach-omap2/irq.c
> @@ -148,6 +148,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
>  	ct->chip.irq_ack = omap_mask_ack_irq;
>  	ct->chip.irq_mask = irq_gc_mask_disable_reg;
>  	ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
> +	ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE;
>  
>  	ct->regs.ack = INTC_CONTROL;
>  	ct->regs.enable = INTC_MIR_CLEAR0;