From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Subject: Re: [PATCH 09/24] drm/i915: detect PCH encoders on
 Haswell
Date: Mon, 30 Apr 2012 17:00:44 -0700
Message-ID: <20120430170044.4323136d@jbarnes-desktop>
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To: Eugeni Dodonov <eugeni.dodonov@intel.com>
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On Thu, 26 Apr 2012 15:21:04 -0300
Eugeni Dodonov <eugeni.dodonov@intel.com> wrote:

> On Haswell, the recommended PCH-connected output is the one driven by DDI
> E in FDI mode, used for VGA connection. All the others are handled by the
> CPU.
> 
> Note that this does not accounts for Haswell/PPT combination yet.
> 
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 758173d..ea1ac15 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2631,6 +2631,18 @@ static bool intel_crtc_driving_pch(struct drm_crtc *crtc)
>  		if (encoder->base.crtc != crtc)
>  			continue;
>  
> +		/* On Haswell, LPT PCH handles the VGA connection via FDI, and Haswell
> +		 * CPU handles all others */
> +		if (IS_HASWELL(dev)) {
> +			if (HAS_PCH_LPT(dev) && (encoder->type == DRM_MODE_ENCODER_DAC))
> +				return true;
> +			else {
> +				DRM_DEBUG_KMS("Haswell detected encoder %d, assuming is CPU\n",
> +						encoder->type);
> +				return false;
> +			}
> +		}
> +
>  		switch (encoder->type) {
>  		case INTEL_OUTPUT_EDP:
>  			if (!intel_encoder_is_pch_edp(&encoder->base))

Do HSW/PPT combinations exist?  If so, we should probably note that
with an error or something loud so that people won't think it should
work...

-- 
Jesse Barnes, Intel Open Source Technology Center