From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [Intel-gfx] [PATCH 6/6] drm/i915: Reject page flips with changed format/offset/pitch Date: Thu, 5 Jul 2012 13:31:17 +0200 Message-ID: <20120705113117.GH5203@phenom.ffwll.local> References: <1337882939-22274-1-git-send-email-ville.syrjala@linux.intel.com> <1337882939-22274-7-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 295A4A0E68 for ; Thu, 5 Jul 2012 04:31:22 -0700 (PDT) Received: by wgbdr1 with SMTP id dr1so6341265wgb.12 for ; Thu, 05 Jul 2012 04:31:21 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1337882939-22274-7-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org On Thu, May 24, 2012 at 09:08:59PM +0300, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > MI display flips can't handle some changes in the framebuffer > format or layout. Return an error in such cases. > = > Signed-off-by: Ville Syrj=E4l=E4 Queued for -next, thanks for the patch. I've punted on the others, hoping for a few i-g-t tests (and maybe someone else that could review them). Safe for the uninitialized stack var patch and this one, because we need this check to fix up gen4+ tileoffset limitations. Yours, Daniel > --- > drivers/gpu/drm/i915/intel_display.c | 13 +++++++++++++ > 1 files changed, 13 insertions(+), 0 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index f4338cb..72ac2f9 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -6217,6 +6217,19 @@ static int intel_crtc_page_flip(struct drm_crtc *c= rtc, > unsigned long flags; > int ret; > = > + /* Can't change pixel format via MI display flips. */ > + if (fb->pixel_format !=3D crtc->fb->pixel_format) > + return -EINVAL; > + > + /* > + * TILEOFF/LINOFF registers can't be changed via MI display flips. > + * Note that pitch changes could also affect these register. > + */ > + if (INTEL_INFO(dev)->gen > 3 && > + (fb->offsets[0] !=3D crtc->fb->offsets[0] || > + fb->pitches[0] !=3D crtc->fb->pitches[0])) > + return -EINVAL; > + > work =3D kzalloc(sizeof *work, GFP_KERNEL); > if (work =3D=3D NULL) > return -ENOMEM; > -- = > 1.7.3.4 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48