From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marcelo Tosatti <mtosatti@redhat.com>
Subject: Re: [PATCH] Enabling IA32_TSC_ADJUST for guest VM
Date: Tue, 9 Oct 2012 11:27:52 -0300
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Cc: "Auld, Will" <will.auld@intel.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"Zhang, Xiantao" <xiantao.zhang@intel.com>
To: Avi Kivity <avi@redhat.com>
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On Tue, Oct 09, 2012 at 04:26:32PM +0200, Avi Kivity wrote:
> On 10/09/2012 04:24 PM, Marcelo Tosatti wrote:
> > On Tue, Oct 09, 2012 at 02:12:18PM +0200, Avi Kivity wrote:
> >> On 10/08/2012 07:30 PM, Marcelo Tosatti wrote:
> >> >=20
> >> > From Intel's manual:
> >> >=20
> >> > =E2=80=A2 If an execution of WRMSR to the IA32_TIME_STAMP_COUNTE=
R MSR adds (or
> >> > subtracts) value X from the TSC,
> >> > the logical processor also adds (or subtracts) value X from the
> >> > IA32_TSC_ADJUST MSR.
> >> >=20
> >> > This is not handled in the patch.=20
> >> >=20
> >> > To support migration, it will be necessary to differentiate betw=
een
> >> > guest initiated and userspace-model initiated msr write. That is=
,=20
> >> > only guest initiated TSC writes should affect the value of=20
> >> > IA32_TSC_ADJUST MSR.
> >> >=20
> >> > Avi, any better idea?
> >> >=20
> >>=20
> >> I think we need that anyway, since there are some read-only MSRs t=
hat
> >> need to be configured by the host (nvmx capabilities).  So if we a=
dd
> >> that feature it will be useful elsewhere.  I don't think it's poss=
ible
> >> to do it in any other way:
> >>=20
> >> "Local offset value of the IA32_TSC for a
> >> logical processor. Reset value is Zero. A
> >> write to IA32_TSC will modify the local
> >> offset in IA32_TSC_ADJUST and the
> >> content of IA32_TSC, but does not affect
> >> the internal invariant TSC hardware."
> >>=20
> >> What we want to do is affect the internal invariant TSC hardware, =
so we
> >> can't do that through the normal means.
> >>=20
> >> btw, will tsc writes from userspace (after live migration) cause t=
sc
> >> skew?  If so we should think how to model a guest-wide tsc.
> >=20
> > No because there is an easy shortcut:
> >=20
> >     if (level =3D=3D KVM_PUT_FULL_STATE) {
> >         /*
> >          * KVM is yet unable to synchronize TSC values of multiple =
VCPUs
> >          * on
> >          * writeback. Until this is fixed, we only write the offset=
 to
> >          * SMP
> >          * guests after migration, desynchronizing the VCPUs, but
> >          * avoiding
> >          * huge jump-backs that would occur without any writeback a=
t
> >          * all.
> >          */
> >         if (smp_cpus =3D=3D 1 || env->tsc !=3D 0) {
> >             kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSC, env->tsc);
> >         }
> >     }
>=20
> Still we write back after migration.  So this needs to be fixed (or I
> misunderstood you).

Handled by kvm_write_tsc() in x86.c. Is this what you mean?