From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: [PATCH 04/18] drm/i915: Avoid clearing preallocated regions from the GTT Date: Fri, 26 Oct 2012 15:22:59 -0700 Message-ID: <20121026152259.5678d90d@bwidawsk.net> References: <1350666204-8101-1-git-send-email-chris@chris-wilson.co.uk> <1350666204-8101-4-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from shiva.chad-versace.us (209-20-75-48.static.cloud-ips.com [209.20.75.48]) by gabe.freedesktop.org (Postfix) with ESMTP id 82A2A9E7DB for ; Fri, 26 Oct 2012 15:22:45 -0700 (PDT) In-Reply-To: <1350666204-8101-4-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, 19 Oct 2012 18:03:10 +0100 Chris Wilson wrote: > Signed-off-by: Chris Wilson > Reviewed-by: Jesse Barnes > --- > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > drivers/gpu/drm/i915/i915_gem_gtt.c | 35 ++++++++++++++++++++++++++++++++--- > 2 files changed, 34 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 687f379..589b2f3 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -908,6 +908,8 @@ enum i915_cache_level { > I915_CACHE_LLC_MLC, /* gen6+, in docs at least! */ > }; > > +#define I915_GTT_RESERVED ((struct drm_mm_node *)0x1) > + > struct drm_i915_gem_object_ops { > /* Interface between the GEM object and its backing storage. > * get_pages() is called once prior to the use of the associated set > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 47e427e..d9d3fc7 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -378,18 +378,47 @@ void i915_gem_init_global_gtt(struct drm_device *dev, > unsigned long end) > { > drm_i915_private_t *dev_priv = dev->dev_private; > + struct drm_mm_node *entry; > + struct drm_i915_gem_object *obj; > > - /* Substract the guard page ... */ > + /* Subtract the guard page ... */ > drm_mm_init(&dev_priv->mm.gtt_space, start, end - start - PAGE_SIZE); > if (!HAS_LLC(dev)) > dev_priv->mm.gtt_space.color_adjust = i915_gtt_color_adjust; > > + /* Mark any preallocated objects as occupied */ > + list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) { > + DRM_DEBUG_KMS("reserving preallocated space: %x + %zx\n", > + obj->gtt_offset, obj->base.size); > + > + BUG_ON(obj->gtt_space != I915_GTT_RESERVED); > + obj->gtt_space = drm_mm_create_block(&dev_priv->mm.gtt_space, > + obj->gtt_offset, > + obj->base.size, > + false); > + obj->has_global_gtt_mapping = 1; > + } > + I think this requires more explanation. I believe on driver init the bound_list should be empty. What am I missing? If this is for some future thing where you're going to bind objects before we init the gtt, a comment in the commit message would have been really terrific. > dev_priv->mm.gtt_start = start; > dev_priv->mm.gtt_mappable_end = mappable_end; > dev_priv->mm.gtt_end = end; > dev_priv->mm.gtt_total = end - start; > dev_priv->mm.mappable_gtt_total = min(end, mappable_end) - start; > > - /* ... but ensure that we clear the entire range. */ > - intel_gtt_clear_range(start / PAGE_SIZE, (end-start) / PAGE_SIZE); > + /* Clear any non-preallocated blocks */ > + list_for_each_entry(entry, &dev_priv->mm.gtt_space.hole_stack, hole_stack) { > + unsigned long hole_start = entry->start + entry->size; > + unsigned long hole_end = list_entry(entry->node_list.next, > + struct drm_mm_node, > + node_list)->start; > + > + DRM_DEBUG_KMS("clearing unused GTT space: [%lx, %lx]\n", > + hole_start, hole_end); > + > + intel_gtt_clear_range(hole_start / PAGE_SIZE, + > (hole_end-hole_start) / PAGE_SIZE); + } + + /* And finally clear the > reserved guard page */ + intel_gtt_clear_range(end / PAGE_SIZE - > 1, 1); } -- Ben Widawsky, Intel Open Source Technology Center