From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gleb Natapov Subject: Re: [PATCH v11 3/3] x86, apicv: add virtual interrupt delivery support Date: Wed, 23 Jan 2013 12:33:01 +0200 Message-ID: <20130123103301.GQ31120@redhat.com> References: <1358331672-32384-1-git-send-email-yang.z.zhang@intel.com> <1358331672-32384-4-git-send-email-yang.z.zhang@intel.com> <20130120125136.GA5119@redhat.com> <20130121050300.GA25818@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: "kvm@vger.kernel.org" , "Shan, Haitao" , "mtosatti@redhat.com" , "Zhang, Xiantao" , "Tian, Kevin" To: "Zhang, Yang Z" Return-path: Received: from mx1.redhat.com ([209.132.183.28]:48080 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754693Ab3AWKdE (ORCPT ); Wed, 23 Jan 2013 05:33:04 -0500 Content-Disposition: inline In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On Wed, Jan 23, 2013 at 12:45:39AM +0000, Zhang, Yang Z wrote: > > We are getting close so please test with userspace irq chip too. > Thanks for your suggestion to test with userspace irqchip. I found some issues and will modify the logic: > As we known, APICv deponds on TPR shadow. But TPR shadow is per VM(it will be disabled when VM uses userspace irq chip), this means APICv also is per VM. But in current implementation, we use the global variable enable_apicv_reg to check whether APICv is used by target vcpu. This is wrong. Instead, it should to read VMCS to see whether the bit is set or not. > No, the apicv and TPR shadow are global for all VMs with irq chip in kernel and VMs without irq chip in kernel skip APIC that code entirely. If there is generic code that should behave differently with or without in-kernel irq chip make the check for the condition there. -- Gleb.