From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tim Deegan Subject: Re: [PATCH 13/45] xen: arm64: dcache flush Date: Thu, 7 Feb 2013 16:14:32 +0000 Message-ID: <20130207161432.GN77133@ocelot.phlegethon.org> References: <1358956576.17440.60.camel@zakaz.uk.xensource.com> <1358956611-8432-13-git-send-email-ian.campbell@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <1358956611-8432-13-git-send-email-ian.campbell@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell Cc: stefano.stabellini@citrix.com, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org At 15:56 +0000 on 23 Jan (1358956579), Ian Campbell wrote: > This drops the > "m" (*_p) > asm contraint. I can't figure out what this was for. > It's to stop the compiler hoisting writes to the wrong side of the flush. It's the lighter-weight equivalent to the "memory" clobber in the range version. By moving from inline "dsb;" to dsb() you've reintroduced the full memory clobber here anyway. :(