From mboxrd@z Thu Jan  1 00:00:00 1970
From: Matt Porter <mporter@ti.com>
Date: Fri, 15 Feb 2013 16:16:27 -0500
Subject: [U-Boot] [PATCH 03/10] am33xx: refactor am33xx clocks and add
 ti814x support
In-Reply-To: <2cc71ab85c654e688082a434442f08d8@DLEE74.ent.ti.com>
References: <1360766644-9901-1-git-send-email-mporter@ti.com>
	<1360766644-9901-4-git-send-email-mporter@ti.com>
	<2cc71ab85c654e688082a434442f08d8@DLEE74.ent.ti.com>
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On Fri, Feb 15, 2013 at 04:37:33PM +0000, Tom Rini wrote:
> On Wed, Feb 13, 2013 at 09:43:57AM -0500, Matt Porter wrote:
> 
> > Split clock.c for am335x and ti814x and add the ti814x include file.
> > 
> > Signed-off-by: Matt Porter <mporter@ti.com>
> 
> [snip]
> > +++ b/arch/arm/cpu/armv7/am33xx/clock-am335x.c
> [snip]
> > +#define PRCM_MOD_EN		0x2
> > +#define PRCM_FORCE_WAKEUP	0x2
> > +#define PRCM_FUNCTL		0x0
> > +
> > +#define PRCM_EMIF_CLK_ACTIVITY	BIT(2)
> > +#define PRCM_L3_GCLK_ACTIVITY	BIT(4)
> > +
> > +#define PLL_BYPASS_MODE		0x4
> > +#define ST_MN_BYPASS		0x00000100
> > +#define ST_DPLL_CLK		0x00000001
> > +#define CLK_SEL_MASK		0x7ffff
> > +#define CLK_DIV_MASK		0x1f
> > +#define CLK_DIV2_MASK		0x7f
> > +#define CLK_SEL_SHIFT		0x8
> > +#define CLK_MODE_SEL		0x7
> > +#define CLK_MODE_MASK		0xfffffff8
> > +#define CLK_DIV_SEL		0xFFFFFFE0
> > +#define CPGMAC0_IDLE		0x30000
> > +#define DPLL_CLKDCOLDO_GATE_CTRL        0x300
> [snip]
> > +++ b/arch/arm/cpu/armv7/am33xx/clock-ti814x.c
> [snip]
> > +	/* Selects OSC0 (20MHz) for DMTIMER1 */
> > +	temp = readl(DMTIMER_CLKSRC);
> > +	temp &= ~(0x7 << 3);
> > +	temp |= (0x4 << 3);
> > +	writel(temp, DMTIMER_CLKSRC);
> > +
> > +	writel(0x2, DM_TIMER1_BASE + 0x54);
> 
> Magic values are defined for clock-am335x.c but not in clock-ti814x.c,
> please fix clock-ti814x.c to define out the magic values ala am335x.c.
> Thanks!

Ok, will clean this up.

-Matt