From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kim Phillips Date: Mon, 4 Mar 2013 16:16:48 -0600 Subject: [U-Boot] [PATCH 3/4 v3] gen: Add ACE acceleration to hash In-Reply-To: <1362154585-16216-4-git-send-email-akshay.s@samsung.com> References: <1362154585-16216-1-git-send-email-akshay.s@samsung.com> <1362154585-16216-4-git-send-email-akshay.s@samsung.com> Message-ID: <20130304161648.9fedf04434e7d200b7c0f33b@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Fri, 1 Mar 2013 11:16:24 -0500 Akshay Saraswat wrote: > +#include > > /* > * These are the hash algorithms we support. Chips which support accelerated > * crypto could perhaps add named version of these algorithms here. > */ > static struct hash_algo hash_algo[] = { > +#ifdef CONFIG_EXYNOS_ACE_SHA > + { > + "SHA1", > + SHA1_SUM_LEN, > + ace_sha_hash_digest, > + ACE_SHA_TYPE_SHA1, > + }, { > + "SHA256", > + SHA256_SUM_LEN, > + ace_sha_hash_digest, > + ACE_SHA_TYPE_SHA256, > + }, Can we make this a generic "hardware accelerated SHA", not tied to vendor-SoC-specific defines? I don't see more than one h/w implementation being used on any one instance of u-boot... > +#ifdef CONFIG_EXYNOS_ACE_SHA > + int (*hash_func_ws)(const unsigned char *input, unsigned int ilen, > + unsigned char *output, unsigned int chunk_sz); > +#else > void (*hash_func_ws)(const unsigned char *input, unsigned int ilen, > unsigned char *output, unsigned int chunk_sz); > +#endif function signature mismatch, but I see Simon already got this. Kim