From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 09/15] drm/i915: there's no PIPESTAT on Gen5+ Date: Thu, 7 Mar 2013 11:19:52 +0200 Message-ID: <20130307091952.GP4469@intel.com> References: <1362611003-4823-1-git-send-email-przanoni@gmail.com> <1362611003-4823-10-git-send-email-przanoni@gmail.com> <20130306232243.GD9021@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 95AE6E5BF4 for ; Thu, 7 Mar 2013 01:19:56 -0800 (PST) Content-Disposition: inline In-Reply-To: <20130306232243.GD9021@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Thu, Mar 07, 2013 at 12:22:43AM +0100, Daniel Vetter wrote: > On Wed, Mar 06, 2013 at 08:03:16PM -0300, Paulo Zanoni wrote: > > From: Paulo Zanoni > > = > > So don't read it when capturing the error state. This solves > > "unclaimed register" messages on Haswell when we have a GPU hang. > > = > > Signed-off-by: Paulo Zanoni > = > Iirc pipestat exists on vlv, so I think this needs a !HAS_PCH_SPLIT test. > Ville should know for sure. Yes, that's right. > -Daniel > = > > --- > > drivers/gpu/drm/i915/i915_irq.c | 5 +++-- > > 1 file changed, 3 insertions(+), 2 deletions(-) > > = > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i91= 5_irq.c > > index 2139714..29b1bb1 100644 > > --- a/drivers/gpu/drm/i915/i915_irq.c > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > @@ -1366,8 +1366,9 @@ static void i915_capture_error_state(struct drm_d= evice *dev) > > else if (INTEL_INFO(dev)->gen =3D=3D 6) > > error->forcewake =3D I915_READ(FORCEWAKE); > > = > > - for_each_pipe(pipe) > > - error->pipestat[pipe] =3D I915_READ(PIPESTAT(pipe)); > > + if (INTEL_INFO(dev)->gen <=3D 4) > > + for_each_pipe(pipe) > > + error->pipestat[pipe] =3D I915_READ(PIPESTAT(pipe)); > > = > > if (INTEL_INFO(dev)->gen >=3D 6) { > > error->error =3D I915_READ(ERROR_GEN6); > > -- = > > 1.7.10.4 > > = > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > = > -- = > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC