From: dave.martin@linaro.org (Dave Martin)
To: linux-arm-kernel@lists.infradead.org
Subject: Anyone implement Cortex A9 FIQ
Date: Mon, 8 Apr 2013 17:28:44 +0100 [thread overview]
Message-ID: <20130408162844.GB2176@linaro.org> (raw)
In-Reply-To: <CAHrpEqT9SSbHYK62i0ZteEd4SfZaa_nw+T0SHunP2W+MUEqmrg@mail.gmail.com>
On Tue, Mar 19, 2013 at 03:49:50PM +0800, Frank Li wrote:
> >
> > Whether this is feasible will really depend on what platform you're on - if
> > there's a secure monitor then FIQs are out of the question anyway. Can you
> > tell us more about the system?
>
> Freescale MX6Q.
>
> >
> > If your average interrupt latency is low then you should just be able to do
> > this with normal IRQs (have you got threaded interrupt handlers?)
>
> Not all drivers use threaded interrupt handler.
>
> >
> > What is it about the situation that leads you to believe that you *need*
> > FIQ?
>
> FIQ can be executed even in spin_lock_saveirq.
> We want do very small hardware set at related precision period (every 125us).
Why is the latency requirement so tight for this one interrupt?
Cheers
---Dave
next prev parent reply other threads:[~2013-04-08 16:28 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-15 7:38 Anyone implement Cortex A9 FIQ Frank Li
2013-03-15 10:46 ` Jonathan Austin
2013-03-17 1:15 ` Frank Li
2013-03-18 19:02 ` Jonathan Austin
2013-03-19 7:49 ` Frank Li
2013-04-08 16:28 ` Dave Martin [this message]
[not found] ` <CAHrpEqR35v76qif0wP=1SNOThLvmzpmEHcbehSNoY7-CO0CRqQ@mail.gmail.com>
2013-04-10 11:10 ` Dave Martin
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