From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gleb Natapov Subject: Re: [RFC PATCH 2/2] Hyper-V iTSC handler Date: Thu, 16 May 2013 11:33:50 +0300 Message-ID: <20130516083349.GL26453@redhat.com> References: <1368445517-5496-1-git-send-email-vrozenfe@redhat.com> <1368445517-5496-3-git-send-email-vrozenfe@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: kvm@vger.kernel.org, mtosatti@redhat.com, pl@dlh.net To: Vadim Rozenfeld Return-path: Received: from mx1.redhat.com ([209.132.183.28]:38679 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755064Ab3EPIdy (ORCPT ); Thu, 16 May 2013 04:33:54 -0400 Content-Disposition: inline In-Reply-To: <1368445517-5496-3-git-send-email-vrozenfe@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On Mon, May 13, 2013 at 09:45:17PM +1000, Vadim Rozenfeld wrote: > Signed-off: Vadim Rozenfeld > > The following patch allows to activate a partition reference > time enlightenment that is based on the host platform's support > for an Invariant Time Stamp Counter (iTSC). > NOTE: This code will survive migration due to lack of VM stop/resume > handlers. > Do you mean "will _not_ survive migration"? > --- > arch/x86/include/uapi/asm/hyperv.h | 10 ++++++++++ > arch/x86/kvm/x86.c | 18 +++++++++++++----- > include/uapi/linux/kvm.h | 1 + > 3 files changed, 24 insertions(+), 5 deletions(-) > > diff --git a/arch/x86/include/uapi/asm/hyperv.h b/arch/x86/include/uapi/asm/hyperv.h > index 9711819..2d9e666 100644 > --- a/arch/x86/include/uapi/asm/hyperv.h > +++ b/arch/x86/include/uapi/asm/hyperv.h > @@ -182,6 +182,9 @@ > #define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_MASK \ > (~((1ull << HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT) - 1)) > > +#define HV_X64_MSR_TSC_REFERENCE_ENABLE 0x00000001 > +#define HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT 12 > + > #define HV_PROCESSOR_POWER_STATE_C0 0 > #define HV_PROCESSOR_POWER_STATE_C1 1 > #define HV_PROCESSOR_POWER_STATE_C2 2 > @@ -194,4 +197,11 @@ > #define HV_STATUS_INVALID_ALIGNMENT 4 > #define HV_STATUS_INSUFFICIENT_BUFFERS 19 > > +typedef struct _HV_REFERENCE_TSC_PAGE { > + uint32_t TscSequence; > + uint32_t Rserved1; > + uint64_t TscScale; > + int64_t TscOffset; > +} HV_REFERENCE_TSC_PAGE, * PHV_REFERENCE_TSC_PAGE; > + Use kernel types: __u32/__u64/__s64. > #endif > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 1a4036d..5788e8f 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -1809,14 +1809,21 @@ static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data) > break; > } > case HV_X64_MSR_REFERENCE_TSC: { > - u64 gfn; > unsigned long addr; > - u32 tsc_ref; > - gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT; > - addr = gfn_to_hva(kvm, gfn); > + HV_REFERENCE_TSC_PAGE tsc_ref; > + tsc_ref.TscSequence = > + boot_cpu_has(X86_FEATURE_CONSTANT_TSC) ? 1 : 0; > + tsc_ref.TscScale = > + ((10000LL << 32) /vcpu->arch.virtual_tsc_khz) << 32; > + tsc_ref.TscOffset = 0; > + if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE)) { > + kvm->arch.hv_tsc_page = data; > + break; > + } > + addr = gfn_to_hva(vcpu->kvm, data >> > + HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT); > if (kvm_is_error_hva(addr)) > return 1; > - tsc_ref = 0; > if(__copy_to_user((void __user *)addr, &tsc_ref, sizeof(tsc_ref))) > return 1; > kvm->arch.hv_tsc_page = data; > @@ -2553,6 +2560,7 @@ int kvm_dev_ioctl_check_extension(long ext) > case KVM_CAP_HYPERV: > case KVM_CAP_HYPERV_VAPIC: > case KVM_CAP_HYPERV_SPIN: > + case KVM_CAP_HYPERV_TSC: > case KVM_CAP_PCI_SEGMENT: > case KVM_CAP_DEBUGREGS: > case KVM_CAP_X86_ROBUST_SINGLESTEP: > diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h > index a5c86fc..8eff540 100644 > --- a/include/uapi/linux/kvm.h > +++ b/include/uapi/linux/kvm.h > @@ -666,6 +666,7 @@ struct kvm_ppc_smmu_info { > #define KVM_CAP_IRQ_MPIC 90 > #define KVM_CAP_PPC_RTAS 91 > #define KVM_CAP_IRQ_XICS 92 > +#define KVM_CAP_HYPERV_TSC 93 > > #ifdef KVM_CAP_IRQ_ROUTING > > -- > 1.8.1.2 -- Gleb.