From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 5/9] drm/i915: use the correct clock when calculating linetime watermarks Date: Tue, 21 May 2013 11:35:03 +0200 Message-ID: <20130521093503.GJ12292@phenom.ffwll.local> References: <1367612625-4823-1-git-send-email-przanoni@gmail.com> <1367612625-4823-6-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f51.google.com (mail-wg0-f51.google.com [74.125.82.51]) by gabe.freedesktop.org (Postfix) with ESMTP id 56424E5D09 for ; Tue, 21 May 2013 02:35:08 -0700 (PDT) Received: by mail-wg0-f51.google.com with SMTP id b12so143636wgh.6 for ; Tue, 21 May 2013 02:35:08 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1367612625-4823-6-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Fri, May 03, 2013 at 05:23:41PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > If we're using DP/eDP, adjusted_mode->clock may be just the port link > clock, but we also can't use mode->clock because it's wrong when we're > using the using panel fitter. > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_pm.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 8468b40..3ca020c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -2021,6 +2021,7 @@ haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc) > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > enum pipe pipe = intel_crtc->pipe; > struct drm_display_mode *mode = &intel_crtc->config.adjusted_mode; > + int target_clock; > u32 temp; > > if (!intel_crtc_active(crtc)) { > @@ -2028,6 +2029,11 @@ haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc) > return; > } > > + if (intel_crtc->config.pixel_target_clock) > + target_clock = intel_crtc->config.pixel_target_clock; > + else > + target_clock = intel_crtc->config.adjusted_mode.clock; I'll ignore this one here, since I already have the real fix at http://cgit.freedesktop.org/~danvet/drm/commit/?h=fdi-dither&id=0600051ee5eb6d13d385c8629c0ab0f7809346be I'll submit the series this patch is a part of asap to intel-gfx. Cheers, Daniel > + > temp = I915_READ(PIPE_WM_LINETIME(pipe)); > temp &= ~PIPE_WM_LINETIME_MASK; > > @@ -2035,7 +2041,7 @@ haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc) > * row at the given clock rate, multiplied by 8. > * */ > temp |= PIPE_WM_LINETIME_TIME( > - DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, mode->clock)); > + DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, target_clock)); > > /* IPS watermarks are only used by pipe A, and are ignored by > * pipes B and C. They are calculated similarly to the common > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch