From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Tue, 21 May 2013 12:39:52 +0200 Subject: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram In-Reply-To: <1369087586-1344-1-git-send-email-ynvich@gmail.com> References: <1369087586-1344-1-git-send-email-ynvich@gmail.com> Message-ID: <201305211239.52671.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Sergey Yanovich, > 2.2.5.2 of Marvell PXA27x Processor Family Developers Manual says: > "The PXA27x processor cache configuration is identical to that of > the PXA255 processor." > > As a result, it is perfectly legitimate to use PXA25X > 'lock_cache_for_stack' on PXA27X as well. > > Signed-off-by: Sergey Yanovich > --- > arch/arm/cpu/pxa/start.S | 10 ++++++++-- > include/configs/lp8x4x.h | 5 +++-- > 2 files changed, 11 insertions(+), 4 deletions(-) Why would you need this on PXA27x ? Is SRAM not enough? Best regards, Marek Vasut