From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Tue, 21 May 2013 22:07:20 +0200
Subject: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram
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	<201305212124.36467.marex@denx.de>
	<1369165375.12900.44.camel@host5.omatika.ru>
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Dear Sergey Yanovich,

> Dear Marek Vasut,
> 
> On Tue, 2013-05-21 at 21:24 +0200, Marek Vasut wrote:
> > I'd love to have a uniform way to do this cache thing, really ...
> 
> Requoting the spec 'The PXA27x processor cache configuration is
> identical to that of the PXA255 processor'. It looks safe to configure
> all PXA2XX chipsets this way.
> 
> Maybe I am missing something, but SPL is no exception in this case.

The OneNAND has 1kbyte limit on code it will directly address when booting from 
it, you can't even make generate the MMU table there.

> > Not really, enabling dcache altogether and marking DRAM region as cached
> > would be much better.
> > 
> > > Repeating my hedge, I don't see the full picture,
> > > yet. It may well be impossible (if U-Boot needs more than 32 kB of
> > > stack)
> > 
> > No way.
> > 
> > > or not worth the effort (if the gain is too small).
> > 
> > The larger gain would be from fixing the U-Boot drivers for PXA to work
> > well with DCache ;-) Then the speedup would really be plenty
> > significant, this can be well confirmed on many other ARM chips.
> 
> I have plans to dig deeper into this after I complete the current
> project. Faster boot is always a good thing. Thanks for explaining in
> details.

Sure, yet I think I just piled work onto you ;-)

Best regards,
Marek Vasut