From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756083Ab3EXOJn (ORCPT ); Fri, 24 May 2013 10:09:43 -0400 Received: from mo4.mail-out.ovh.net ([178.32.228.4]:57607 "EHLO mo4.mail-out.ovh.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752149Ab3EXOJm (ORCPT ); Fri, 24 May 2013 10:09:42 -0400 Date: Fri, 24 May 2013 16:05:28 +0200 From: Jean-Christophe PLAGNIOL-VILLARD To: Boris BREZILLON Cc: Joachim Eastwood , Nicolas Ferre , Russell King , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Ovh-Mailout: 178.32.228.4 (mo4.mail-out.ovh.net) Subject: Re: [PATCH] ARM: at91/dt: add pinctrl definition for at91 tc blocks Message-ID: <20130524140528.GE24476@game.jcrosoft.org> References: <1369389956-30466-1-git-send-email-b.brezillon@overkiz.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1369389956-30466-1-git-send-email-b.brezillon@overkiz.com> X-PGP-Key: http://uboot.jcrosoft.org/plagnioj.asc X-PGP-key-fingerprint: 6309 2BBA 16C8 3A07 1772 CC24 DEFC FFA3 279C CE7C User-Agent: Mutt/1.5.20 (2009-06-14) X-Ovh-Tracer-Id: 8404279854827350905 X-Ovh-Remote: 213.251.161.87 (ns32433.ovh.net) X-Ovh-Local: 213.186.33.20 (ns0.ovh.net) X-OVH-SPAMSTATE: OK X-OVH-SPAMSCORE: -100 X-OVH-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeiiedrtdegucetufdoteggodetrfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-Spam-Check: DONE|U 0.5/N X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeiiedrtdegucetufdoteggodetrfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12:05 Fri 24 May , Boris BREZILLON wrote: > Hello, > > This patch adds pinctrl configs for at91 Timer Conter blocks. > These pin configs will be referenced by "atmel,tcb-pwm" devices to > setup pins as PWM output. you need to rebase on a cleanup I did preset on our git tag at91-3.11-cleanup As we announce Mandaotory for 3.11 as I introduce Macro fro DT Best Regards, J. From mboxrd@z Thu Jan 1 00:00:00 1970 From: plagnioj@jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD) Date: Fri, 24 May 2013 16:05:28 +0200 Subject: [PATCH] ARM: at91/dt: add pinctrl definition for at91 tc blocks In-Reply-To: <1369389956-30466-1-git-send-email-b.brezillon@overkiz.com> References: <1369389956-30466-1-git-send-email-b.brezillon@overkiz.com> Message-ID: <20130524140528.GE24476@game.jcrosoft.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 12:05 Fri 24 May , Boris BREZILLON wrote: > Hello, > > This patch adds pinctrl configs for at91 Timer Conter blocks. > These pin configs will be referenced by "atmel,tcb-pwm" devices to > setup pins as PWM output. you need to rebase on a cleanup I did preset on our git tag at91-3.11-cleanup As we announce Mandaotory for 3.11 as I introduce Macro fro DT Best Regards, J.