From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH] drm/i915: fix up the edp power well check
Date: Fri, 31 May 2013 17:23:35 +0200
Message-ID: <20130531152334.GW15743@phenom.ffwll.local>
References: <1369850171-16754-1-git-send-email-daniel.vetter@ffwll.ch>
	<s5h1u8n2r3y.wl%tiwai@suse.de>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org>
Received: from mail-ea0-f178.google.com (mail-ea0-f178.google.com
	[209.85.215.178])
	by gabe.freedesktop.org (Postfix) with ESMTP id CB5EEE5D0C
	for <intel-gfx@lists.freedesktop.org>;
	Fri, 31 May 2013 08:23:39 -0700 (PDT)
Received: by mail-ea0-f178.google.com with SMTP id q15so1775409ead.23
	for <intel-gfx@lists.freedesktop.org>;
	Fri, 31 May 2013 08:23:39 -0700 (PDT)
Content-Disposition: inline
In-Reply-To: <s5h1u8n2r3y.wl%tiwai@suse.de>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
To: Takashi Iwai <tiwai@suse.de>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>, Paulo Zanoni <paulo.r.zanoni@intel.com>
List-Id: intel-gfx@lists.freedesktop.org

On Fri, May 31, 2013 at 03:53:05PM +0200, Takashi Iwai wrote:
> At Wed, 29 May 2013 19:56:11 +0200,
> Daniel Vetter wrote:
> > 
> > Now that we track the cpu transcoder we need accurately in the pipe
> > config we can finally fix up the transcoder check. With the current
> > code eDP on port D will be broken since we'd errornously cut the
> > power.
> > 
> > For reference see
> > 
> > commit 2124b72e6283c4e84a55e71077fee91793f4c801
> > Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Date:   Fri Mar 22 14:07:23 2013 -0300
> > 
> >     drm/i915: don't disable the power well yet
> > 
> > Cc: Takashi Iwai <tiwai@suse.de>
> 
> Sorry, I have no hardware that showed the problem around here for
> testing now, unfortunately.

Np, that was just an fyi cc ;-)
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch