From mboxrd@z Thu Jan  1 00:00:00 1970
From: Albert ARIBAUD <albert.u.boot@aribaud.net>
Date: Fri, 5 Jul 2013 23:02:00 +0200
Subject: [U-Boot] [RFC PATCH] arm: arm926ejs: flush cache before disable
 it
In-Reply-To: <1372768555-12477-1-git-send-email-voice.shen@gmail.com>
References: <1372768555-12477-1-git-send-email-voice.shen@gmail.com>
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To: u-boot@lists.denx.de

Hi Bo,

On Tue,  2 Jul 2013 12:35:54 +0000, Bo Shen <voice.shen@gmail.com>
wrote:

> flush cache before disable it
> 
> Signed-off-by: Bo Shen <voice.shen@gmail.com>
> ---
>  arch/arm/cpu/arm926ejs/cpu.c |    5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c
> index 626384c..10aa165 100644
> --- a/arch/arm/cpu/arm926ejs/cpu.c
> +++ b/arch/arm/cpu/arm926ejs/cpu.c
> @@ -46,15 +46,14 @@ int cleanup_before_linux (void)
>  
>  	disable_interrupts ();
>  
> +	/* flush I/D-cache */
> +	cache_flush();
>  
>  	/* turn off I/D-cache */
>  	icache_disable();
>  	dcache_disable();
>  	l2_cache_disable();
>  
> -	/* flush I/D-cache */
> -	cache_flush();
> -
>  	return 0;
>  }

What is this change supposed to fix? There is no need to flush before
disabling, and actually, flushing before disabling runs the risk that
between the two, some cache lines be dirtied again so that cache and
memory won't be coherent any more.

Amicalement,
-- 
Albert.